The present disclosure provides a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device includes a drain electrode, a first oxide semiconductor layer, and a gate dielectric layer. The first oxide semiconductor layer is disposed below the drain electrode and has a first surface in contact with the drain electrode. The gate dielectric layer is disposed below the drain electrode and has a second surface in contact with the drain electrode. A first elevation of the first surface is higher than or identical to a second elevation of the second surface.

In an embodiment, a method includes forming a first nanostructure and a second nanostructure over a substrate, the first nanostructure being interposed between the substrate and the second nanostructure; etching a first sidewall of the first nanostructure to be recessed from a second sidewall of the second nanostructure; depositing a first dielectric layer along the first sidewall, the second sidewall, and the substrate; etching a recess in the first dielectric layer, the recess extending toward the first sidewall of the first nanostructure; depositing a second dielectric layer in the recess over the first dielectric layer; and removing the first dielectric layer and the second dielectric layer from the second sidewall and the substrate.

A semiconductor device and the method of forming the same are provided. The semiconductor device may include a first region and a second region. The first region may include a first nanostructure and a second nanostructure, a first gate structure with a first length between the first nanostructure and the second nanostructure, a first dielectric layer on a sidewall of the first gate structure, and a first source/drain region. The second region may include a third nanostructure and a fourth nanostructure, a second gate structure with a second length between the third nanostructure and the fourth nanostructure, a second dielectric layer on a sidewall of the second gate structure, and a second source/drain region. The second length may be larger than the first length. The first dielectric layer and the second dielectric layer may include a same material.

A semiconductor device and the method of forming the same are provided. The semiconductor device may include a first nanostructure and a second nanostructure, a gate structure between the first nanostructure and the second nanostructure, a source/drain region along sidewalls of the first nanostructure and the second nanostructure, and a spacer layer between the source/drain region and gate structure. A first portion of the spacer layer may protrude from the source/drain region towards the gate structure. The first portion of the spacer layer may protrude into a recess of the gate structure.

A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of semiconductor patterns spaced apart from each other, a source/drain pattern connected to the plurality of semiconductor patterns, a gate electrode including, an inner electrode between a first semiconductor pattern of the plurality of semiconductor patterns and a second semiconductor pattern of the plurality of semiconductor patterns, the first semiconductor pattern and the second semiconductor pattern being adjacent to each other, and an outer electrode on an uppermost semiconductor pattern of the plurality of semiconductor patterns.

A semiconductor device includes a substrate including first and second regions; a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern, a height of the second lower pattern being identical to a height of the first lower pattern, and second sheet patterns; a first gate structure including a first gate insulating film and a first gate electrode; a second gate structure including a second gate insulating film, and a second gate electrode, a width of the second gate electrode being greater than a width of the first gate electrode; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a number of first sheet patterns is smaller than a number of second sheet patterns.

A semiconductor device includes an oxide semiconductor layer, a gate insulating layer on the oxide semiconductor layer, a metal oxide layer having an opening overlapping at least a portion of the oxide semiconductor layer and contacting an upper surface of the gate insulating layer in a region not overlapping the oxide semiconductor layer, and a gate electrode on the gate insulating layer in a region overlapping the oxide semiconductor layer.

A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N). In addition, a first distance between the first electrode and the gate insulating layer in a first direction from the first electrode to the second electrode is smaller than a second distance between the first electrode and the gate electrode in the first direction.

A semiconductor device including a source/drain region, a first nanostructure adjacent the source/drain region, a second nanostructure adjacent the source/drain region, the second nanostructure disposed above the first nanostructure, and a third nanostructure adjacent the source/drain region. The second nanostructure is disposed above the second nanostructure. The semiconductor device also includes a gate structure around the first nanostructure, the second nanostructure, and the third nanostructure. A first portion of the gate structure is disposed between the first nanostructure and the second nanostructure, and a second portion of the gate structure disposed between the second nanostructure and the third nanostructure. The second portion of the gate structure has a smaller length than the first portion of the gate structure.

A method of forming a semiconductor device includes: forming, in a first device region of the semiconductor device, first nanostructures over a first fin that protrudes above a substrate; forming, in a second device region of the semiconductor device, second nanostructures over a second fin that protrudes above the substrate, where the first and the second nanostructures include a semiconductor material and extend parallel to an upper surface of the substrate; forming a dielectric material around the first and the second nanostructures; forming a first hard mask layer in the first device region around the first nanostructures and in the second device region around the second nanostructures; removing the first hard mask layer from the second device region after forming the first hard mask layer; and after removing the first hard mask layer, increasing a first thickness of the dielectric material around the second nanostructures by performing an oxidization process.