There is provided a semiconductor device (100) including a floating region (202) of a second conductivity type which is arranged below a lower end (43) of a first gate trench portion (40), and which does not extend to a region below a lower end (33) of a first dummy trench portion, at an upper surface side of a semiconductor substrate (10), in which a first mesa portion has an emitter region (12) of a first conductivity type which is provided in contact with the first gate trench portion, and which has a higher concentration than that of a drift region (18), and a base region (14) of the second conductivity type, and the lower end of the first dummy trench portion is in contact with a region of the first conductivity type.

Provided is a semiconductor device including: a first doping concentration peak farthest from a lower surface of a semiconductor substrate; and a second doping concentration peak second farthest from the lower surface, in which a predetermined conditional expression is satisfied when an integrated concentration of SiH donors at the first doping concentration peak is denoted as N.sub.1, an integrated concentration of CiOi-H donors between the first doping concentration peak and the second doping concentration peak is denoted as N.sub.COH, a carbon chemical concentration of the semiconductor substrate is denoted as N.sub.C, and N=N.sub.1+N.sub.COH.

There is provided a semiconductor device which includes a plurality of transistor regions; a gate pad provided above a semiconductor substrate; a plurality of gate wiring portions each of which corresponds to each of the plurality of transistor regions; and a plurality of wiring resistance portions each of which is electrically connected to the gate pad and corresponds to each of the plurality of gate wiring portions. The plurality of gate wiring portions may include a gate metal layer provided above the semiconductor substrate and a gate runner provided below the gate metal layer. A built-in resistance portion may be electrically connected between the gate pad and the plurality of gate wiring portions.

A semiconductor device includes a semiconductor layer having first and second principal surfaces, an insulated gate bipolar transistor (IGBT) region formed in the semiconductor layer, and a diode region formed adjacent to the IGBT region in a first direction. A plurality of gate trenches are arranged in the IGBT region and extend in a second direction intersecting the first direction. Each trench includes a gate conductive layer embedded through a gate insulating layer, and unit cells are defined between adjacent trenches. An emitter region is formed on the first principal surface of each unit cell. The emitter region of a unit cell located closer to the diode region has a smaller area than the emitter region of a unit cell located farther from the diode region.

Provided is an insulated gate semiconductor device with a configuration contributing to a minimization of a mesa part between trenches. The insulated gate semiconductor device includes: a drift layer of a first conductivity-type; base regions of a second conductivity-type provided on the drift layer; contact regions of the second conductivity-type provided at upper parts of the base regions; main electrode regions of the first conductivity-type provided on the base regions and the contact regions; gate electrodes buried in gate trenches, dummy electrodes buried in dummy trenches, and contact parts buried in contact trenches, in which the contact trenches are located closer to the dummy trenches than a position away by an equal distance from each of the gate trenches and the dummy trenches.

A transistor includes a first orientation-controlling film, a plurality of blocking films located over the first orientation-controlling film and including an insulating material, an active layer located over the plurality of blocking films and containing a gallium nitride-based compound, and a first terminal and a second terminal over the active layer. An entire bottom surface of the first terminal overlaps one of the plurality of blocking films and an entire bottom surface of the second terminal overlaps another one of the plurality of blocking films.

The present description concerns a method of forming a cavity in a substrate comprising: the forming of an etch mask comprising, opposite the location of the cavity, a plurality of sets of openings, the ratio between the openings and the mask of each set being selected according to the desired profile of the cavity opposite the surface of the mask having the set inscribed therein; and the wet etching of the substrate through the openings.

A semiconductor device includes first and second electrodes, a semiconductor part, a gate electrode, and a first part that is insulative. The first and second electrodes are located in first, second, and third regions. The semiconductor part is located between the first electrode and the second electrode. The gate electrode is located in the semiconductor part in the first region. The first part is located on the first electrode in the third region. The first region is an IGBT region. The second region is a diode region. The third region separates the first region and the second region between the first region and the second region. In the third region, a bottom surface of the first part contacts the first electrode; an upper surface of the first part contacts a fourth semiconductor layer; and a side surface of the first part contacts a third semiconductor layer.

Disclosed herein is a junction barrier Schottky diode that includes: a semiconductor substrate; a drift layer provided on the semiconductor substrate; a field insulating film covering an annular outer peripheral area of an upper surface of the drift layer; an anode electrode brought into Schottky-contact with a center area of the upper surface of the drift layer that is surrounded by the outer peripheral area, an end portion of the anode electrode being positioned on the field insulating film; a cathode electrode brough into ohmic contact with the semiconductor substrate; a p-type semiconductor layer embedded in a first trench formed in the center area of the drift layer so as to be connected to the anode electrode and the drift layer; and a conductive member contacting the field insulating film and electrically connected to the semiconductor substrate.

In one embodiment, the semiconductor device (1) comprises a semiconductor body (2), a gate electrode (33) and a first electrode (31), whereinthe semiconductor body (2) comprises a first region (21) which is a source region or an emitter region, and comprises a well region (22), the first region (21) is of a first conductivity type and the well region (22) is of a different, second conductivity type,the well region (22) is separated from the gate electrode (33) by a gate insulator layer (4),the first region (21) is electrically contacted by means of the first electrode (31) which is a source electrode or an emitter electrode,in the first region (21) there is at least one current limiting region (5), andthe at least one current limiting region (5) is of at least one electrically insulating material.