Disclosed are a solar cell and a method of manufacturing the same. The solar cell with a graphene-silicon quantum dot hybrid structure according to an embodiment of the present disclosure includes a hybrid structure including a silicon quantum dot layer, in which a silicon oxide layer includes a plurality of silicon quantum dots; a doped graphene layer formed on the silicon quantum dot layer, and an encapsulation layer formed on the doped graphene layer; and electrodes formed on upper and lower parts of the hybrid structure.

A photovoltaic device including a single junction solar cell provided by an absorption layer of a type IV semiconductor material having a first conductivity, and an emitter layer of a type III-V semiconductor material having a second conductivity, wherein the type III-V semiconductor material has a thickness that is no greater than 50 nm.

Disclosed herein are a solar cell and a method of manufacturing the same. The solar cell module includes a semiconductor substrate, a first passivation film located on a front surface of the semiconductor substrate, a second passivation film located on a rear surface of the semiconductor substrate, a front electric field region located on the first passivation film on the front surface of the semiconductor substrate and being of a same conductivity-type as that of the semiconductor substrate, an emitter region located on the second passivation film on the rear surface of the semiconductor substrate and being of a conductivity-type opposite that of the semiconductor substrate, first electrodes conductively connected to the front electric field region, and second electrode conductively connected to the emitter region.

There is provided a method of producing a photovoltaic device comprising a photoactive region comprising a layer of perovskite material, wherein the layer of perovskite material is disposed on a surface that has a roughness average (R.sub.a) or root mean square roughness (R.sub.rms) of greater than or equal to 50 nm. The method comprises using vapour deposition to deposit a substantially continuous and conformal solid layer comprising one or more initial precursor compounds of the perovskite material, and subsequently treating the solid layer with one or more further precursor compounds to form a substantially continuous and conformal solid layer of the perovskite material on the rough surface. There is also provided a photovoltaic device comprising a photoactive region comprising a layer of perovskite material disposed using the method.

Solar cell structures that have improved carrier collection efficiencies at a heterointerface are provided by low temperature epitaxial growth of silicon on a III-V base. Additionally, a solar cell structure having improved open circuit voltage includes a shallow junction III-V emitter formed by epitaxy or diffusion followed by the epitaxy of Si.sub.xGe.sub.1-x passivated by amorphous Si.sub.yGe.sub.1-y:H.

This application is directed to a low cost IC solution that provides Super CMOS microelectronics macros. Hereinafter, SCMOS refers to Super CMOS and Schottky CMOS. SCMOS device solutions includes a niche circuit element, such as complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co, Ti, Ni or other metal atoms or compounds) to P- and N-Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros are composed of diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form (i) generic logic gates, (ii) functional blocks of microprocessors and microcontrollers such as but not limited to data paths, multipliers, muliplier-accumaltors, (ii) memory cells and control circuits of various types (SRAM's with single or multiple read/write port(s), binary and ternary CAM's), (iii) multiplexers, crossbar switches, switch matrices in network processors, graphics processors and other processors to implement a variety of communication protocols and algorithms of data processing engines for (iv) Analytics, (v) block-chain and encryption-based security engines (vi) Artificial Neural Networks with specific circuits to emulate or to implement a self-learning data processor similar to or derived from the neurons and synapses of human or animal brains, (vii) analog circuits and functional blocks from simple to the complicated including but not limited to power conversion, control and management either based on charge pumps or inductors, sensor signal amplifiers and conditioners, interface drivers, wireline data transceivers, oscillators and clock synthesizers with phase and/or delay locked loops, temperature monitors and controllers; all the above are built from discrete components to all grades of VLSI chips. Solar photovoltaic electricity conversion, bio-lab-on-a-chip, hyperspectral imaging (capture/sensing and processing), wireless communication with various transceiver and/or transponder circuits for ranges of frequency that extend beyond a few 100 MHz, up to multi-THz, ambient energy harvesting either mechanical vibrations or antenna-based electromagnetic are newly extended or nacent fields of the SCMOS IC applications.

A photovoltaic device, particularly a solar cell, comprises an interface between a layer of Group III-V material and a layer of Group IV material with a thin silicon diffusion barrier provided at or near the interface. The silicon barrier controls the diffusion of Group V atoms into the Group IV material, which is doped n-type thereby. The n-type doped region can provide the p-n junction of a solar cell in the Group IV material with superior solar cell properties. It can also provide a tunnel diode in contact with a p-type region of the III-V material, which tunnel diode is also useful in solar cells.

A laser processing system can be utilized to produce high-performance interdigitated back contact (IBC) solar cells. The laser processing system can be utilized to ablate, transfer material, and/or laser-dope or laser fire contacts. Laser ablation can be utilized to remove and pattern openings in a passivated or emitter layer. Laser transferring may then be utilized to transfer dopant and/or contact materials to the patterned openings, thereby forming an interdigitated finger pattern. The laser processing system may also be utilized to plate a conductive material on top of the transferred dopant or contact materials.

Disclosed is a solar cell including a semiconductor substrate including a semiconductor material, a tunneling layer disposed over one surface of the semiconductor substrate, a first conductive area and a second conductive area disposed over the tunneling layer and having opposite conductive types, and an electrode including a first electrode electrically connected to the first conductive area and a second electrode electrically connected to the second conductive area. At least one of the first conductive area and the second conductive area is configured as a metal compound layer.

A silicon solar cell has doped amorphous silicon contacts formed on a tunnel silicon oxide layer on a surface of a silicon substrate. High temperature processing is unnecessary in fabricating the solar cell.