A method of manufacturing a high electron mobility transistor (HEMT) structure is disclosed. By controlling a passivation layer and a barrier layer to uninterruptedly grow in the same growth chamber, defects of the passivation layer generated in the growth process due to a drastic change in temperature, pressure, or atmosphere or degrading a quality of an interface between the passivation layer and the barrier layer could be avoided, thereby providing the passivation layer with a good quality and the interface between the passivation layer and the barrier layer with a good quality, so that the objective of improving the performance of the HEMT structure could be achieved.

A method for manufacturing a semiconductor device includes forming a first insulating layer on a first nitride semiconductor layer having a principal surface, forming a mask including a first mask opening on the first insulating layer, forming a first opening in the first insulating layer through the first mask opening, forming a second nitride semiconductor layer on the first nitride semiconductor layer inside the first opening, forming a second insulating layer covering a boundary between the second nitride semiconductor layer and the first insulating layer through the first mask opening and thereafter removing the mask, forming a second opening in the second insulating layer, forming a first electrode on the second insulating layer contacting the second nitride semiconductor layer through the second opening, and forming a gate electrode above the first nitride semiconductor layer, and separated from the second insulating layer in a plan view perpendicular to the principal surface.

The present disclosure provides a fabricating method of a high electron mobility transistor device, including a substrate, a nucleation layer, a buffer layer, an active layer and a gate electrode. The nucleation layer is disposed on the substrate, and the buffer layer is disposed on the nucleation layer, wherein the buffer layer includes a first superlattice layer having at least two heteromaterials alternately arranged in a horizontal direction, and a second superlattice layer having at least two heteromaterials vertically stacked along a vertical direction. The at least two heteromaterials stack at least once within the second superlattice layer. The active layer is disposed on the buffer layer, and the gate electrode is disposed on the active layer.

In a described example, an integrated circuit (IC) is disclosed that includes a transistor. The transistor includes a substrate, and a buffer structure overlying the substrate. The buffer structure has a first buffer layer, a second buffer layer overlying the first buffer layer, and a third buffer layer overlying the second buffer layer. The first buffer layer has a first carbon concentration, the second buffer layer has a second carbon concentration lower than the first carbon concentration, and the third buffer layer has a third carbon concentration higher than the second carbon concentration. An active structure overlies the buffer structure.

Scribe line channels are formed between semiconductor dies that are formed on a gallium nitride (GaN) layer using an aluminum nitride-based (AlN-based) core substrate. The scribe line channels are formed to expose a release layer under the GaN layer, which enables the release layer to be etched through the scribe line channels to remove the semiconductor dies from the AlN-based core substrate with minimal to no damage to the AlN-based core substrate. In this way, the scribe line channels enable the AlN-based core substrate to be reused for subsequent GaN layer growth, and increase the number of times that the AlN-based core substrate can be reused to form GaN-based semiconductor devices. This reduces the cost and complexity of manufacturing GaN-based semiconductor devices.

Electronic devices are formed on donor substrates and transferred to carrier substrates by forming bonding regions on the electronic devices and bonding the bonding regions to a carrier substrate. The transfer process may include forming anchors and removing sacrificial regions.

A process for producing semiconductor structures comprising one of more layers of Group III/IV Compounds deposited onto a template using PVD sputtering the resulting semiconductor structures is provided according to the invention. The Group III or Group IV material may be gallium, hafnium, indium, aluminum, silicon, germanium, magnesium and/or zirconium. The anion provided by a reactive gas may be nitride, oxide, arsenide, or phosphide. The flow of the reactive gas to the vacuum chamber used to react with the sputtered Group III or Group IV target material for produce the Group III/IV Compound layer onto the template is modulated during a duty cycle during the PVD sputtering process between a target-rich condition and a reactive gas-rich condition to enhance the efficiency of the PVD sputtering process and improve the crystallinity of the Group III/IV Compound layer within the resulting semiconductor structure.

A semiconductor device includes a first III-V nitride-based layer, a second III-V nitride-based layer, a nitride-based transition layer, and a nitride-based transistor. The first III-V nitride-based layer is disposed over a substrate by applying a first V/III ratio in a first range. The second III-V nitride-based layer is disposed over the first III-V nitride-based layer by applying a second V/III ratio in a second range, in which the first range and the second range are mutually exclusive. The nitride-based transition layer is disposed between the first III-V nitride-based layer and the second III-V nitride-based layer to connect the first III-V nitride-based layer with the second III-V nitride-based layer, in which the nitride-based transition layer is formed by applying a third V/III ratio in a third range between the first range and second range. The nitride-based transistor is disposed over the second III-V nitride-based layer.

Provided are a crack-free laminated film and a structure including this laminated film. This laminated film includes: a buffer layer; and at least one layer of gallium nitride base film disposed on the buffer layer. Moreover, the compression stress of the entire laminated film is 2.0 to 5.0 GPa.

A method for growing a III-V material may include forming at least one layer on a stack including a crystalline layer made of III-V material, a first masking layer surmounting the germination layer, the first masking layer having at least one first opening; depositing a second masking layer covering an upper face of the sacrificial layer; forming at least one second opening in the second masking layer; removing the sacrificial layer selectively at the first masking layer and at the second masking layer; epitaxially growing a material made of the III-V material from the germination layer; forming al least one third opening in the second masking layer; and epitaxially growing at least one material made of the III-V material from the first epitaxial layer.