A transistor amplifier package includes a package substrate comprising conductive patterns exposed by solder mask patterns at a surface thereof, and at least one transistor die comprising a semiconductor structure attached to the surface of the package substrate by a solder material and aligned by the solder mask patterns such that respective gate, drain, and/or source terminals of the at least one transistor die are electrically connected to respective ones of the conductive patterns. Related transistor amplifiers and fabrication methods are also discussed.

Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.

A high-frequency device includes a metal base, a dielectric substrate mounted on the metal base, an insulator layer provided on the metal base, covering the dielectric substrate, and having a dielectric constant smaller than that of the dielectric substrate, and a first line that overlaps the dielectric substrate as seen from a thickness direction of the insulator layer and is provided on an upper surface of the insulator layer to form a first microstrip line.

An amplifier device may include at least one two-stage amplifier package, where an amplifier of a first amplification stage of the amplifier package may be aligned opposite to amplifiers of a second amplification stage of the amplifier package. The amplifier device may be a three-stage amplifier device, where the second stage of the two-stage amplifier package is coupled to amplifiers of a final (third) stage, which may be in a Doherty configuration. The amplifiers of the second stage may be arranged in any of a class AB configuration, a Doherty configuration, a multi-stage Doherty configuration (with amplifiers of the final amplification stage), or a multi-driver, multi-stage Doherty configuration. One or more passive components used for inter-stage impedance matching may be disposed outside of the two-stage amplifier package. Amplifiers of the first, second, and third amplification stages may each be gallium nitride (GaN) amplifiers, in some embodiments.

An output matching circuit includes a transformer having one end electrically connected to an output terminal of a power amplifier element that amplifies an input signal and another end electrically connected to a terminal connected to a load, and converting an impedance of the terminal connected to the load to an impedance higher than an impedance of the output terminal, a first filter circuit that attenuates a signal within a first frequency band higher than a transmission frequency band of the input signal, and a second filter circuit that attenuates a signal within a second frequency band higher than the first frequency band.

A method of fabricating a semiconductor device includes forming a protective structure on at least one die on a substrate. The protective structure exposes one or more electrical contacts on a first surface of the at least one die. Respective terminals are formed on the one or more electrical contacts exposed by the protective structure. Related packages and fabrication methods are also discussed.

Example embodiments relate to Doherty amplifiers. One example includes a radiofrequency (RF) power amplifier. The RF power amplifier includes an input lead. The RF power amplifier also includes a first output lead. Additionally, the RF power amplifier includes a first semiconductor die arranged in between the input lead and the first output lead. The first semiconductor die includes a first edge arranged adjacent to the input lead and an opposing second edge arranged adjacent to the first output lead. Further, the RF power amplifier includes a field-effect transistor integrated on the first semiconductor die. The field-effect transistor includes a gate bondpad assembly and a drain bondpad assembly. The field-effect transistor also includes a plurality of gate bondwires and a plurality of drain bondwires. In addition, the field-effect transistor includes a plurality of gate fingers extending in a first direction and a plurality of drain fingers extending in a second direction.

A semiconductor device package includes an interconnect structure with a first surface having at least one die thereon and a second surface that is opposite the first surface and is configured to be coupled to an external device. A protective structure on the first surface of the interconnect structure exposes a heat dissipating surface facing away from the interconnect structure in one or more directions. Related devices and fabrication methods are also discussed.

An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.

A packaged module can include a packaging substrate with first and sides, first and second components mounted on the first and second sides, respectively, and first and second overmolds implemented on the first and second sides, respectively, with the second overmold defining a mounting surface. The packaged module can further include a plurality of conductive features implemented on the second side of the packaging substrate to provide electrical connections for the packaged module, with the conductive features being formed from conductive material having a sufficiently high melting temperature so that the conductive features do not melt during a mounting operation. Each conductive feature can have a surface that is substantially coplanar with or recessed with respect to the mounting surface, and a solderable material layer can be dimensioned to cover the surface of each conductive feature.