A system and/or method for utilizing MEMS switching technology to operate MEMS sensors. As a non-limiting example, a MEMS switch may be utilized to control DC and/or AC bias applied to MEMS sensor structures. Also for example, one or more MEMS switches may be utilized to provide drive signals to MEMS sensors (e.g., to provide a drive signal to a MEMS gyroscope).

A hybrid device comprising Metal Oxide Sensors in a Gas Chromatography column is described, whereby the readings from the MOS devices will vary along the column in reaction to the sample reflecting the differential delays imposed on the components of the sample depending on the elutive effect of the adsorbent lining the column for the respective component. By this means, a family of readings is obtained, any one of which may be easier to interpret for a particular sample, and which may be compared amongst themselves providing an additional measurement dimension. The behaviour of later sections of column or sensors may be modified dynamically during a measurement cycle depending on the readings obtained at the earlier stages.

A sensor chip includes a first substrate with a first surface and a second surface including at least one CMOS circuit, a first MEMS substrate with a first surface and a second surface on opposing sides of the first MEMS substrate, a second substrate, a second MEMS substrate, and a third substrate including at least one CMOS circuit. The first surface of the first substrate is attached to a packaging substrate and the second surface of the first substrate is attached to the first surface of the first MEMS substrate. The second surface of the first MEMS substrate is attached to the second substrate. The first substrate, the first MEMS substrate, the second substrate and the packaging substrate are provided with electrical inter-connects.

A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.

A downhole sensor system includes a first sensor package having a substrate, an integrated circuit chip mounted to the substrate, the integrated circuit chip including a processor, a transducer chip mounted to the integrated circuit chip, and a plurality of sensors configured to measure at least shock, pressure, temperature, and humidity. At least one of the plurality of sensors is mounted to the transducer chip such that a stack is formed at least from the substrate, the integrated circuit, the transducer chip, and the sensor. The plurality of sensors are in communication with the processor.

A method for functionalizing a surface of a dielectric plate that is transparent to visible light—to be able to examine the dielectric plate using optical microscopy—includes depositing a negative film on the dielectric slide. The negative film comprises a polymerizable composition that polymerizes when exposed to an electron beam. The polymerizable composition is polymerized—by exposing the negative film to the electronic beam—at a set of points representing a preset pattern. Non-polymerized portions of the polymerizable composition are dissolved—to develop the negative film—forming a set of pads of polymerized portions of the polymerizable composition. Each pad corresponds to one point of the preset pattern. A metal film is disposed on the negative film, and the developed negative film is dissolved to define holes through the metal film. Each of the holes corresponds to a base of one pad of the set of pads.

A method for forming a nanostructure includes coating an exposed surface of a base layer with a patterning layer. The method further includes forming a pattern in the patterning layer including nano-patterned non-random openings, such that a bottom portion of the non-random openings provides direct access to the exposed surface of the base layer. The method also includes depositing a material in the non-random openings in the patterning layer, such that the material contacts the exposed surface to produce repeating individually articulated nano-scale features. The method includes removing remaining portions of the patterning layer. The method further includes forming an encapsulation layer on exposed surfaces of the repeating individually articulated nanoscale features and the exposed surface of the base layer.

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.

A semiconductor package structure includes an electronic device having a first surface and an exposed region adjacent to the first surface; a dam disposed on the first surface and surrounding the exposed region of the electronic device; and a filter structure disposed on the dam.

A package for encapsulating a functional area against an environment includes a base substrate and a cover substrate, the base substrate together with the cover substrate defining at least part of the package or defining the package, and furthermore including the at least one functional area provided in the package, and a blocking way for reducing permeation between the environment and the functional area. The package may include at least one laser bonding line, and the substrates of the package can be hermetically joined to one another by the at least one laser bonding line, and the laser bonding line has a height (HL) perpendicular to its bonding plane.