A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure.

An electronic component comprises a substrate including a main surface on which a functional unit is formed and a cap layer defining a cavity enclosing and covering the functional unit. The cap layer is provided with holes communicating an inside of the cavity with an outside of the cavity. A resin layer covers the cap layer and the main surface and includes one or more bores and a solder layer having a thickness less than a thickness of the resin layer disposed within the one or more bores.

A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.

A semiconductor device may include a first substrate, a first electrical component, a lid, a second substrate, and a second electrical component. The first substrate may include an upper surface, a lower surface, and an upper cavity in the upper surface. The first electrical component may reside in the upper cavity of the first substrate. The lid may cover the upper cavity and may include a port that permits fluid to flow between an environment external to the semiconductor device and the upper cavity. The second substrate may include the second electrical component mounted to an upper surface of the second substrate. The lower surface of the first substrate and the upper surface of the second substrate may fluidically seal the second electrical component from the upper cavity.

A method for providing a plurality of hermetically sealed packages, including the steps of: providing at least two substrates including a first substrate and a second substrate, at least one of the at least two substrates being a transparent substrate, the two substrates being arranged directly adjoining each other or on top of one another, the transparent substrate defining a circumferential rim and an upper side of each package, the bottom of the package being defined by the second substrate, a respective contact area being defined at contact surfaces between the two substrates; sealing each functional area in a hermetically tight manner by bonding the two substrates along the contact area of each package; and dicing each package by a cutting step or a separating step, a particle jet being used to abrasively remove a material from the transparent substrate by the particle jet.

A cover for an infrared detector and a method of fabricating the cover are disclosed. The cover comprises a wafer comprising a material such as silicon that transmits infrared radiation. The wafer has a first surface and a second surface opposite the first surface. An antireflective region is formed in the wafer to enhance transmission of infrared radiation through the cover. The antireflective region comprises a first plurality of antireflective elements such as moth-eyes formed in the first surface. The first plurality of antireflective elements are sized and shaped and arranged relative to one another to form a region of graded refractive index at the first surface so as to reduce the amount of infrared radiation reflected by the cover at the antireflective region. The cover comprises a wall extending from the first surface and surrounding the antireflective region. The wall comprises a plurality of layers of material deposited on the wafer so that, when the cover is bonded to a sensor substrate via the wall, a cavity is formed that encapsulates a sensor region of the sensor substrate. The depth of the cavity may be adjusted by depositing the plurality of layers of material with a combined thickness equivalent to the desired depth of the cavity. A second plurality of antireflective elements may be formed in the second surface to enhance the antireflective properties of the antireflective region.

A method is provided that includes forming a first metal layer of a seal structure over a micro-electromechanical system (MEMS) structure and over a channel formed through the MEMS structure to an integrated circuit of a semiconductor structure. The first metal layer is formed at a first temperature. The method includes forming a second metal layer over the first metal layer. The second metal layer is formed at a second temperature less than the first temperature. The method includes performing a first cooling process to cool the semiconductor structure.

A micro-electromechanical system (MEMS) device includes a moveable element within a cavity. The MEMS device also includes a first layer over the cavity, the first layer having a first hole and a second hole. The first hole has a first diameter. The second hole has a second diameter. The second diameter is larger than the first diameter, and the second hole is farther from the moveable element than the first hole. The first hole is sealed with a first dielectric material. The second hole is sealed with a second dielectric material. The cavity filled with a gas at a pressure of at least approximately 10 torr.

A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.