A coating for protecting a wafer from moisture and debris due to dicing, singulating, or handling the wafer is provided. A semiconductor sensor device comprises a wafer having a surface and at least one trench feature and the protective coating covering the trench feature. The trench feature comprises a plurality of walls and the walls are covered with the protective coating, wherein the walls of the trench feature are formed as a portion of the semiconductor sensor device. The semiconductor sensor device further comprises a patterned mask formed on the wafer before the trench feature is formed, wherein the protective coating is formed directly to the trench feature and the patterned mask. The semiconductor sensor device is selected from a group consisting of a MEMS die, a sensor die, a sensor circuit die, a circuit die, a pressure die, an accelerometer, a gyroscope, a microphone, a speaker, a transducer, an optical sensor, a gas sensor, a bolometer, a giant megnetoresistive sensor (GMR), a tunnel magnetoresistive (TMR) sensor, an environmental sensor, and a temperature sensor.

In one example, a method comprises forming a first layer on a substrate surface, forming an opening in the first layer, forming a second layer on the first layer and in the opening, and forming a photoresist layer on the second layer, in which the photoresist layer has a first curved surface over a first part of the first layer and over the opening. The method further comprises etching the photoresist layer and a second part of the second layer over the first part of the first layer to form a second curved surface on the second part of the second layer, and forming a mirror element and a support structure in the second layer, including by etching a third part of the second layer and removing the first layer.

A shadow mask having two or more levels of openings enables selective step coverage of micro-fabricated structures within a micro-optical bench device. The shadow mask includes a first opening within a top surface of the shadow mask and a second opening within the bottom surface of the shadow mask. The second opening is aligned with the first opening and has a second width less than a first width of the first opening. An overlap between the first opening and the second opening forms a hole within the shadow mask through which selective coating of micro-fabricated structures within the micro-optical bench device may occur.

A method for producing a first and second micromirror device. A silicon oxide layer is applied to at least the front side of a silicon wafer. The silicon oxide layer is removed so that a first and second separation region of the silicon oxide layer are generated, which are arranged spatially separated from each other along a separation plane. A silicon layer is applied to the front side of the silicon wafer and to the silicon oxide layer. An etching mask is applied to the rear side of the silicon wafer, the etching mask having a first opening along the separation plane of the first and second separation region. The silicon layer and the silicon wafer are removed, according to the etching mask on the rear side of the silicon wafer and according to the silicon oxide layer of the first and second separation region.

A structure forming method according to an aspect is a structure forming method for forming a first hole and a second hole having width smaller than width of the first hole in a substrate with dry etching and forming a structure. The structure forming method includes forming an etching mask on the substrate, etching a portion of the etching mask overlapping a first hole forming region where the first hole is formed, etching a portion of the etching mask overlapping a second hole forming region where the second hole is formed, and performing the dry etching of the substrate using the etching mask as a mask.

The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

A rigid mask protects selective portions of a chip including a plurality of wells for biochemical reactions. The rigid mask includes a supporting portion and a plurality of legs, where each leg is provided with a rigid stem and a plate. The plurality of legs are arranged and fixed with respect to the supporting portion in a way aligned to the spatial arrangement of the wells, and are configured in such a way that, when each leg is inserted into the corresponding well, the respective plate covers at least in part the bottom of the well, protecting it during a chemical/physical treatment of side walls of the wells.

In various embodiments, electronic devices such as touch-panel displays incorporate interconnects featuring a conductor layer and, disposed above the conductor layer, a capping layer comprising an alloy of Cu and one or more refractory metal elements selected from the group consisting of Ta, Nb, Mo, W, Zr, Hf, Re, Os, Ru, Rh, Ti, V, Cr, and Ni.

Disclosed are sulfur-containing compounds for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers on a substrate and plasma etching methods of using the same. The plasma etching compounds may provide improved selectivity between the Si-containing layers and mask material, less damage to channel region, a straight vertical profile, and reduced bowing in pattern high aspect ratio structures.

Embodiments of the disclosure provide a micromachined mirror assembly having a mirror-base layer, a first reflective layer on a top surface of the mirror-base layer, and a second reflective layer on a bottom surface of the mirror-base layer. In an example, the first reflective layer is reflective to incident light of the micromachined mirror assembly, and the first reflective layer and the second reflective layer are made of a same material and have same dimensions.