A MEMS infrared sensing device includes a substrate and an infrared sensing element. The infrared sensing element is provided above the substrate and has a sensing area and an infrared absorbing area which do not overlap each other. The infrared sensing element includes two infrared absorbing structures, an infrared sensing layer provided between the two infrared absorbing structures, and an interdigitated electrode structure located in the sensing area. Each of the two infrared absorbing structures includes at least one infrared absorbing layer, and the two infrared absorbing structures are located in the sensing area and the infrared absorbing area. The infrared sensing layer is located in the sensing area and does not extend into the infrared absorbing area. The interdigitated electrode structure is in electrical contact with the infrared sensing layer.

A method of forming an ultrasonic transducer device includes forming and patterning a film stack over a substrate, the film stack comprising a metal electrode layer and a chemical mechanical polishing (CMP) stop layer formed over the metal electrode layer; forming an insulation layer over the patterned film stack; planarizing the insulation layer to the CMP stop layer; measuring a remaining thickness of the CMP stop layer; and forming a membrane support layer over the patterned film stack, wherein the membrane support layer is formed at thickness dependent upon the measured remaining thickness of the CMP stop layer, such that a combined thickness of the CMP stop layer and the membrane support layer corresponds to a desired transducer cavity depth.

The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.

A MEMS infrared sensing device includes a substrate and an infrared sensing element. The infrared sensing element is provided above the substrate and has a sensing area and an infrared absorbing area which do not overlap each other. The infrared sensing element includes two infrared absorbing structures, an infrared sensing layer provided between the two infrared absorbing structures, and an interdigitated electrode structure located in the sensing area. Each of the two infrared absorbing structures includes at least one infrared absorbing layer, and the two infrared absorbing structures are located in the sensing area and the infrared absorbing area. The infrared sensing layer is located in the sensing area and does not extend into the infrared absorbing area. The interdigitated electrode structure is in electrical contact with the infrared sensing layer.

Various embodiments may provide a method of fabricating a meta-lens structure. The method may include forming a first dielectric layer in contact with a silicon wafer. The method may also include forming a second dielectric layer in contact with the first dielectric layer. A refractive index of the second dielectric layer may be different from a refractive index of the first dielectric layer. The method may further include, in patterning the second dielectric layer. The method may additionally include removing at least a portion of the silicon wafer to expose the first dielectric layer.

The damascene wiring structure includes a base including a main surface provided with a groove, an insulating layer including a first portion provided on an inner surface of the groove and a second portion provided on the main surface, a metal layer provided on the first portion, a wiring portion embedded in the groove, and a cap layer provided to cover the second portion, an end portion of the metal layer, and the wiring portion. A surface of a boundary part between the first portion and the second portion includes an inclined surface inclined with respect to a direction perpendicular to the main surface. The end portion of the metal layer enters between the cap layer and the inclined surface, and in the end portion, a first surface along the cap layer and a second surface along the inclined surface form an acute angle.

A substrate for sensing, a method of manufacturing the substrate, and an analyzing apparatus including the substrate are provided. The substrate for sensing includes: a support layer; a plurality of metal nanoparticle clusters arranged on the support layer; and a plurality of perforations arranged among the plurality of metal nanoparticle clusters. The plurality of metal nanoparticle clusters each comprise a plurality of metal nanoparticles stacked in a three-dimensional structure. Each of the plurality of perforations transmits incident light therethrough.

A manufacturing method for a bonded substrate that includes preparing a first substrate having a surface with a projected portion in a central region of the surface, preparing a second substrate, and bonding the first substrate and the second substrate using the projected portion as a bonding surface to be bonded to the second substrate.

The present invention provides a new architecture of system-on-chip ultrasonic transducer array. It is based on fusion bond of two active wafers which have prefabricated CMOS integrated circuits and CMUT structures; precise thin-down of one wafer to form CMUT monocrystalline silicon membrane; and then to vertically connect CMUT array to CMOS IC layers underneath. This architecture can realize a high-density CMUT array with multiple layers of CMOS devices, such as all supporting CMOS ICs, to achieve a SOC solution. The present invention further provides a manufacturing method for above-mentioned SOC CMUT approach, and this manufacturing process can be realized in both 8 inch and 12-inch wafer manufacturing fabs. The disclosed manufacturing processes are more compatible with existing CMOS process flow, more cost-competitive for mass production.

A micro-electro-mechanical system (MEMS) device includes a supporting substrate, a cavity disposed in the supporting substrate, a stopper, and a MEMS structure. The stopper is disposed between the supporting substrate and the cavity, and an inner sidewall of the stopper is in contact with the cavity. The stopper includes a filling material surrounding a periphery of the cavity, and a liner wrapping around the filling material. The MEMS structure is disposed over the cavity and attached on the stopper and the supporting substrate.