B81C2201/0132

TOP NOTCH SLIT PROFILE FOR MEMS DEVICE
20230232159 · 2023-07-20 ·

Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) device in which a slit at a movable mass of the MEMS device has a top notch slit profile. The MEMS device may, for example, be a speaker, an actuator, or the like. The slit extends through the movable mass, from top to bottom, and has a width that is uniform, or substantially uniform, from the bottom of the movable mass to proximate the top of movable mass. Further, in accordance with the top notch slit profile, top corner portions of the MEMS substrate in the slit are notched, such that a width of the slit bulges at the top of the movable mass. The top notch slit profile may, for example, increase the process window for removing an adhesive from the slit while forming the MEMS device.

METHOD FOR PRODUCING A BONDING PAD FOR A MICROMECHANICAL SENSOR ELEMENT

A method for producing a bonding pad for a micromechanical sensor element. The method includes: depositing a first metal layer onto a top face of the functional layer, and depositing a second metal layer onto the first metal layer, wherein only the first layer or only the second layer is formed in a border region extending around a bonding pad region; covering a protective layer over a top face of the second metal layer in the bonding pad region and over the first or second metal layer in an inner peripheral portion of the border region, which inner peripheral portion adjoins the bonding pad region; etching the first or second layer at least in an outer peripheral portion of the border region down to the top face of the functional layer; removing the protective layer; carrying out an etching process starting from the top face of the layered structure.

Surface micromechanical element and method for manufacturing the same

The present publication discloses a micromechanical structure including at least one active element, the micromechanical structure comprising a substrate, at least one layer formed on the substrate forming the at least part of the at least one active element, mechanical contact areas through which the micromechanical structure can be connected to other structures like printed circuit boards and like. In accordance with the invention the micromechanical structure includes weakenings like trenches around the mechanical contact areas for eliminating the thermal mismatch between the active element of the micromechanical structure and the other structures.

CANTILEVERED PIEZOELECTRIC MICROELECTROMECHANICAL SYSTEMS MICROPHONE
20230012046 · 2023-01-12 ·

A piezoelectric microelectromechanical systems (MEMS) microphone is provided comprising a substrate including walls defining a cavity and at least one of the walls defining an anchor region, a piezoelectric film layer supported by the substrate at the anchor region such that the piezoelectric film layer is cantilevered, the piezoelectric film layer being formed to introduce differential stress between a front surface of the piezoelectric film layer oriented away from the cavity and a back surface of the piezoelectric film layer oriented towards the cavity such that the piezoelectric film layer is bent into the cavity, and an electrode disposed over the piezoelectric film layer and adjacent the anchor region. A method of manufacturing such a MEMS microphone is also provided.

Semiconductor device including a microelectromechanical structure and an associated integrated electronic circuit

An integrated semiconductor device includes: a MEMS structure; an ASIC electronic circuit; and conductive interconnection structures electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.

MICRO-MACHINED ULTRASOUND TRANSDUCERS WITH INSULATION LAYER AND METHODS OF MANUFACTURE
20230002213 · 2023-01-05 ·

Disclosed is a multi-silicon on insulator (SOI) micromachined ultrasonic transducer (MUT) device. The device comprises a multi-SOI substrate and a MUT. The MUT is affixed to a surface of the multi-SOI substrate. The multi-SOI substrate has a first SOI layer and at least a second SOI layer disposed above the first SOI layer. The first SOI layer and the second SOI layer each comprise an insulating layer and a semiconducting layer. The first SOI layer further defines a cavity located under a membrane of a MUT and one or more trenches at least partially around a perimeter of the cavity.

Semiconductor package structure and method for manufacturing the same

A semiconductor package structure includes an electronic device having a first surface and an exposed region adjacent to the first surface; a dam disposed on the first surface and surrounding the exposed region of the electronic device; and a filter structure disposed on the dam.

Layered silicon and stacking of microfluidic chips

An apparatus for sorting macromolecules includes a first chip including a channel formed in a first side of the first chip and having at least one monolithic sorting structure for sorting macromolecules from the sample fluid. A first set of vias formed in the first chip has openings in a second side of the first chip, the sample fluid being provided to the sorting structure through the first set of vias. A second set of vias formed in the first chip has openings in the second side for receiving macromolecules in the sample fluid greater than or equal to a prescribed dimension sorted by the sorting structure. A third set of vias formed in the first chip has openings in the second side for receiving macromolecules in the sample fluid less than the prescribed dimension. The apparatus includes first and second seals covering the first and second sides, respectively.

Method for forming semiconductor structure

A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

MEMs membrane structure and method of fabricating same

Disclosed is a method of fabricating a MEMS membrane structure. The method comprises: forming a silicon oxide film dam structure on a silicon substrate; depositing an adhesive layer and then forming a sacrificial layer; depositing a surface protective film on the sacrificial layer; etching the surface protective film and the sacrificial layer, thus forming trenches of first to third rows on the silicon oxide film dam structure; depositing a support film inside of the trenches of first to third rows and on the surface protective film of the sacrificial layer, thus forming a membrane; and removing the sacrificial layer disposed inside the support film deposited inside of the trench of first row, thus forming an empty space.