A coating for protecting a wafer from moisture and debris due to dicing, singulating, or handling the wafer is provided. A semiconductor sensor device comprises a wafer having a surface and at least one trench feature and the protective coating covering the trench feature. The trench feature comprises a plurality of walls and the walls are covered with the protective coating, wherein the walls of the trench feature are formed as a portion of the semiconductor sensor device. The semiconductor sensor device further comprises a patterned mask formed on the wafer before the trench feature is formed, wherein the protective coating is formed directly to the trench feature and the patterned mask. The semiconductor sensor device is selected from a group consisting of a MEMS die, a sensor die, a sensor circuit die, a circuit die, a pressure die, an accelerometer, a gyroscope, a microphone, a speaker, a transducer, an optical sensor, a gas sensor, a bolometer, a giant megnetoresistive sensor (GMR), a tunnel magnetoresistive (TMR) sensor, an environmental sensor, and a temperature sensor.

A method of manufacturing a semiconductor structure includes following operations. A first substrate is provided. A plate is formed over the first substrate. The plate includes a first tensile member, a second tensile member, a semiconductive member between the first tensile member and the second tensile member, and a plurality of apertures penetrating the first tensile member, the semiconductive member and the second tensile member. A membrane is formed over and separated from the plate. The membrane include a plurality of holes. A plurality of conductive plugs passing through the plate or membrane are formed. A plurality of semiconductive pads are formed over the plurality of conductive plugs. The plate is bonded to a second substrate. The second substrate includes a plurality of bond pads, and the semiconductive pads are in contact with the bond pads.

A microfluidic chip and a fabrication method of the microfluidic chip are provided. The microfluidic chip includes an array substrate, and a hydrophobic layer disposed on a side of the array substrate. The hydrophobic layer includes at least one through-hole, and a through-hole of the at least one through-hole penetrates through the hydrophobic layer along a direction perpendicular to a plane of the array substrate. The microfluidic chip also includes at least one hydrophilic structure. A hydrophilic structure of the at least one hydrophilic structure is disposed in the through-hole.

The disclosure relates to a method for manufacturing recessed micromechanical structures in a MEMS device wafer. First vertical trenches in the device wafer define the horizontal dimensions of both level and recessed structures. The horizontal face of the device wafer and the vertical sidewalls of the first vertical trenches are then covered with a self-supporting etching mask which is made of a self-supporting mask material, which is sufficiently rigid to remain standing vertically in the location where it was deposited even as the sidewall upon which it was deposited is etched away. Recess trenches are then etched under the protection of the self-supporting mask. The method allows a spike-preventing aggressive etch to be used for forming the recess trenches, without harming the sidewalls in the first vertical trenches.

In an embodiment, a method for manufacturing a micro-electro-mechanical systems (MEMS) transducer device includes providing a substrate body with a surface, depositing an etch-stop layer (ESL) on the surface, depositing a sacrificial layer on the ESL, depositing a diaphragm layer on the sacrificial layer and removing the sacrificial layer, wherein depositing the sacrificial layer includes depositing a first sub-layer of a first material and depositing a second sub-layer of a second material, and wherein the first material and the second material are different materials.

The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.

In an embodiment, an integrated MEMS transducer device includes a substrate body having a first electrode on a substrate, an etch stop layer located on a surface of the substrate, a suspended micro-electro-mechanical systems (MEMS) diaphragm with a second electrode, an anchor structure with anchors connecting the MEMS diaphragm to the substrate body and a sacrificial layer in between the anchors of the anchor structure, the sacrificial layer including a first sub-layer of a first material, wherein the first sub-layer is arranged on the etch stop layer, a second sub-layer of a second material, wherein the second sub-layer is arranged on the first sub-layer, and wherein the first and the second material are different materials.

A method for manufacturing a micromechanical structure in the structural layer of a wafer by forming a first gap and a second gap depositing and patterning a first etching mask and a second etching mask on a horizontal face of the structural layer, etching trenches through the structural layer in the first and second unprotected areas which are not protected by the first etching mask or the second etching mask, coating at least the sidewalls of the trenches with a protective layer and removing the second etching mask at least from a second opening in the first etching mask, so that a temporarily protected area is exposed, and etching away the structural layer in the exposed temporarily protected area.

A method for providing a semiconductor layer arrangement on a substrate which comprises providing a semiconductor layer arrangement having a functional layer and a semiconductor substrate layer, attaching the semiconductor layer arrangement to a glass substrate layer such that the functional layer is arranged between the glass substrate layer and the semiconductor substrate layer, and removing the semiconductor substrate layer at least partially such that the glass substrate layer substitutes the semiconductor substrate layer as the substrate of the semiconductor layer arrangement.

The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.