III-Nitride layers having spatially controlled regions or domains of porosities therein with tunable optical, electrical, and thermal properties are described herein. Also disclosed are methods for preparing and using such III-nitride layers.

Disclosed is a preparation method for a semiconductor structure. The semiconductor structure includes: a substrate; an epitaxial layer and an epitaxial structure that are stacked on the substrate in sequence. The epitaxial layer is doped with a doping element. In the forming process, a sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that a concentration of the doping element in the epitaxial layer is lower than a preset value. In this application, the sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that the concentration of the doping element in the epitaxial layer is lower than the preset value, so as to prevent the doping element in the epitaxial layer from being precipitated upward into an upper-layer structure, ensure the mobility of electrons in a channel layer, and improve the performance of a device.

Disclosed is a preparation method for a semiconductor structure. The semiconductor structure includes: a substrate; an epitaxial layer and an epitaxial structure that are stacked on the substrate in sequence. The epitaxial layer is doped with a doping element. In the forming process, a sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that a concentration of the doping element in the epitaxial layer is lower than a preset value. In this application, the sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that the concentration of the doping element in the epitaxial layer is lower than the preset value, so as to prevent the doping element in the epitaxial layer from being precipitated upward into an upper-layer structure, ensure the mobility of electrons in a channel layer, and improve the performance of a device.

A method is provided for forming Group IIIA-nitride layers, such as GaN, on substrates. The Group IIIA-nitride layers may be deposited on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates. The Group IIIA-nitride layers may be deposited by heteroepitaxial deposition on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates.

A method comprising: forming a first mask over a substrate; forming one or more shadow walls in the openings of the first mask by selective area growth; forming a second mask over the substrate and shadow walls; forming a second material in the openings of the second mask by selective area growth; and depositing a layer of deposition material by angled deposition over parts of the substrate, shadow walls and second material, whereby regions shadowed by the shadow walls are left uncoated. In embodiments the second material may be a semiconductor and the deposition material may be a superconductor, and the method may be used to form one or more semiconductor-superconductor nanowires for inducing majorana zero modes as part of a quantum computing device.

A method comprising: forming a first mask over a substrate; forming one or more shadow walls in the openings of the first mask by selective area growth; forming a second mask over the substrate and shadow walls; forming a second material in the openings of the second mask by selective area growth; and depositing a layer of deposition material by angled deposition over parts of the substrate, shadow walls and second material, whereby regions shadowed by the shadow walls are left uncoated. In embodiments the second material may be a semiconductor and the deposition material may be a superconductor, and the method may be used to form one or more semiconductor-superconductor nanowires for inducing majorana zero modes as part of a quantum computing device.

A high-quality crystalline film having less impurity of Si and the like and useful in semiconductor devices is provided. A crystalline film containing a crystalline metallic oxide including gallium as a main component, wherein the crystalline film includes a Si in a content of 2×10.sup.15 cm.sup.−3 or less.

A high-quality crystalline film having less impurity of Si and the like and useful in semiconductor devices is provided. A crystalline film containing a crystalline metallic oxide including gallium as a main component, wherein the crystalline film includes a Si in a content of 2×10.sup.15 cm.sup.−3 or less.

A method comprising providing a carbonaceous material, the substrate having a first thermal conductivity. The method further comprises depositing a first masking layer having a second thermal conductivity on at least a portion of the substrate, a ratio of the second thermal conductivity to the first thermal conductivity being less than or equal to 1:30. The method further comprises depositing a second masking layer on the first masking layer to form an etch mask, and etching an exposed portion of the substrate.

A method of making a Group III nitride material that includes: providing a substrate; patterning a template on the substrate; depositing a layer of a material comprising aluminum, gallium and nitrogen on the substrate at a temperature; annealing the layer comprising aluminum, gallium and nitrogen; epitaxially growing Distributed Bragg Reflectors to form a structure on the substrate that comprises microcavities; and etching micropillars in the structure for at least 30 seconds with a heated basic solution is described.