A substrate inspection apparatus may include a communication circuit, a plurality of light sources, an image sensor, at least one memory, and at least one processor. The processor may be configured to generate pin insertion state information indicating an insertion state of each of a plurality of first pins by using a pattern light reflected from each of the plurality of first pins, detect at least one second pin having an insertion defect from among the plurality of first pins by using at least one of the pin insertion reference information and the pin insertion state information of each of the plurality of first pins, generate a control signal for adjusting at least one first process parameter among a plurality of process parameters of the pin insertion apparatus, and control the communication circuit to transmit the control signal to the pin insertion apparatus.

Various defects in an electronic assembly can be intelligently identified with a system having at least a server connected to a first capture module and a second capture module. The first capture module may be positioned proximal a first manufacturing line while the second capture module is positioned proximal a second manufacturing line. Images can be collected of first and second electronic assemblies by respective first and second capture modules prior to the images being sent to a classification module of the server where at least one defect is automatically detected in each of the first and second electronic assemblies concurrently with the classification module.

An electronic component evaluation method is provided for evaluating an electronic component. The electronic component has a lower surface facing a mounting substrate, an upper surface having a flat main surface, and a plurality of mounting terminals configured to be mounted on the mounting substrate. The method includes the steps of: obtaining terminal position information of the plurality of mounting terminals; generating a reference plane including at least three of the plurality of mounting terminals in response to the terminal position information; and detecting a height of at least one of the upper surface or the lower surface relative to the reference plane.

An apparatus and method for measuring loop height of overlapping bonded wires, interconnecting the pads of a single or stacked silicon chips to the pads of a substrate taking the steps of: focussing of an optical assembly at multiple points of the bond wire including overlapping bond wires, capturing an image of the bond wire at each of the predetermined focused points; calculating the height of each point of the wire with respect to a reference plane; and tabulating the height data using the X, Y and Z coordinates.

An apparatus and method for measuring loop height of overlapping bonded wires, interconnecting the pads of a single or stacked silicon chips to the pads of a substrate taking the steps of: focussing of an optical assembly at multiple points of the bond wire including overlapping bond wires, capturing an image of the bond wire at each of the predetermined focused points; calculating the height of each point of the wire with respect to a reference plane; and tabulating the height data using the X, Y and Z coordinates.

An electronic component evaluation method of evaluating a state of an electronic component includes acquiring reference point information, with respect to at least one terminal, reference point information including at least one of position information and first height information of a plurality of corresponding reference points on the terminal from imaging data obtained by image-capturing the electronic component including a component body and a plurality of terminals attached to the component body, and determining a state according to a shape of the electronic component based on a plurality of pieces of the reference point information.

A detection method for a display panel motherboard and a display panel motherboard. The detection method for the display panel motherboard including a plurality of display panels arranged in a matrix includes: dividing the display panel motherboard into a plurality of detection regions, at least one detection region corresponding to at least a portion of each display panel in a same string of display panels; performing a defect detection on patterns in all the display panels in the at least one detection region.

An electronic component evaluation method is provided for evaluating an electronic component. The electronic component has a lower surface facing a mounting substrate, an upper surface having a flat main surface, and a plurality of mounting terminals configured to be mounted on the mounting substrate. The method includes the steps of: obtaining terminal position information of the plurality of mounting terminals; generating a reference plane including at least three of the plurality of mounting terminals in response to the terminal position information; and detecting a height of at least one of the upper surface or the lower surface relative to the reference plane.

A substrate inspection apparatus may include a communication circuit, a plurality of light sources, an image sensor, at least one memory, and at least one processor. The processor may be configured to generate pin insertion state information indicating an insertion state of each of a plurality of first pins by using a pattern light reflected from each of the plurality of first pins, detect at least one second pin having an insertion defect from among the plurality of first pins by using at least one of the pin insertion reference information and the pin insertion state information of each of the plurality of first pins, generate a control signal for adjusting at least one first process parameter among a plurality of process parameters of the pin insertion apparatus, and control the communication circuit to transmit the control signal to the pin insertion apparatus.

Various defects in an electronic assembly can be intelligently identified with a system having at least a server connected to a first capture module and a second capture module. The first capture module may be positioned proximal a first manufacturing line while the second capture module is positioned proximal a second manufacturing line. Images can be collected of first and second electronic assemblies by respective first and second capture modules prior to the images being sent to a classification module of the server where at least one defect is automatically detected in each of the first and second electronic assemblies concurrently with the classification module.