A testing apparatus for electromagnetically sensitive equipment includes a housing defining a testing chamber. The housing blocks transmission of electromagnetic waves from an external environment into the testing chamber and reduces reflection of electromagnetic waves within the testing chamber. The testing apparatus also includes a tube defining an air flow path between the testing chamber and the external environment. The tube blocks transmission of electromagnetic waves from the external environment into the air flow path. The tube includes a proximal end coupled to an opening in the housing such that the air flow path is fluidly coupled to the testing chamber via the opening, a distal end opposing the proximal end, and a bent segment extending between the proximal end and the distal end.

Electrostatic discharge (ESD) test systems include a FET-based pulse generator using pairs of back-to-back FETs coupled to produce an ESD pulse based on discharging a capacitor that is coupled in series with a device under test (DUT). A number of FETs can be selected based on an intended ESD test voltage magnitude.

A test assembly for testing an antenna-in-package (AiP) device includes a socket over a circuit board, where the socket includes an opening for receiving the AiP device; a plunger configured to move along sidewalls of the opening, where during testing of the AiP device, the plunger is configured to cause the AiP device to be pressed towards the circuit board such that the AiP device is operatively coupled to the circuit board via input/output connections of the AiP device and of the circuit board; and a loadboard disposed within the socket and between the plunger and the AiP device, where the loadboard includes a coupling structure configured to be electromagnetically coupled to a transmit antenna and to a receive antenna of the AiP device, so that testing signals transmitted by the transmit antenna are conveyed to the receive antenna externally relative to the AiP device through the coupling structure.

The present disclosure relates to an electronic device (10) comprising at least one electrically conductive structure (11) with a tubular shape having outer and inner surfaces (11c, 11d) covered by an insulating layer (12), and one or more integrated circuits (13) positioned within the electrically conductive structure (11).

Disclosed are exemplary embodiments of electrostatic discharge (ESD) pulse generators that may provide improved system level ESD robustness characterization and qualification analysis.

Some aspects of this disclosure are directed to an automated method to check electrostatic discharge (ESD) effect on a victim device. For example, some aspects of this disclosure relate to a method, including determining a probe point, in a circuit design, for determining effective resistance between the probe point and ground, where the probe point is on an ESD path of in the circuit design. The method includes determining voltage between the probe point and the ground. The method further includes comparing, by a processing device, a resistance value of the ESD path determined based a predefined electric current value at a source point and the measured voltage with a target resistance value range. The method further includes reporting a violation upon determining that the determined resistance value of the ESD path is outside the target resistance value range.

The present invention relates to a measuring apparatus, comprising: an arbitrary waveform generator to generate, and inject to a coupling network, a combination of N test signals; the coupling network to couple the N test signals to an EUT, and the responses thereof and those signals generated by the EUT itself, to a measuring unit; the measuring unit to measure the electrical rn signals provided by the coupling network; and—a processing unit to process the N test signals and the measured electrical signals, to obtain: the electromagnetic signals, noise or EMI generated by the EUT; and—the Z, Y or S parameters of the EUT or any other meaningful set of parameters that can be computed from the aforementioned ones or from voltages and currents. The invention also relates to a measuring method adapted to perform method steps with the apparatus of the invention.

A method of testing a semiconductor package is provided. The method includes forming a first metallization layer, wherein the first metallization layer includes a first conductive pad electrically connected to a charge measurement unit and a charge receiving unit; performing a first test against the charge measurement unit through the first conductive pad to determine whether breakdown occurs in the charge measurement unit; and in response to determining that no breakdown occurs in the charge measurement unit, forming a second dielectric layer over the first metallization layer, wherein a portion of the first conductive pad is exposed from the second dielectric layer.

Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

A mount board has a plurality of terminals electrically connected to a plurality of pins of a semiconductor device, and a conductor pattern. An electrostatic withstand voltage test device includes a metal plate on which the mount board is installed, a power supply for applying a voltage to the metal plate, an insulator disposed between the metal plate and the mount board, a switch circuit connected between the terminals and ground wiring, and a controller for controlling the switch circuit. The switch circuit includes a plurality of first switches provided corresponding to the terminals and each connecting a corresponding terminal to the ground wiring. The controller turns on at least one first switch selected from the first switches when an electric charge stored in the conductor pattern is discharged to the ground wiring through the semiconductor device.