A method for determining an emission coefficient of a device under test (DUT) using a test circuit comprises coupling a parameter measurement circuit associated with the test circuit to an input pin associated with the DUT, wherein the input pin is coupled to a diode element within the DUT and performing voltage and current measurements associated with the input pin using the parameter measurement circuit. In some embodiments, the method further comprises determining a plurality of contact resistance values respectively based on the voltage and current measurements and an emission coefficient estimate using a contact resistance estimation circuit; and determining an emission coefficient associated with the DUT based on the determined plurality of contact resistance values using an emission coefficient determination circuit.

The present disclosure relates to a method for estimating parameters of a junction of a power semi-conductor element comprising: •—Detecting at least one stable on-line operating condition through measurements (2, 3, 4) of Von, Ion, Tc on a semi-conductor module (1) where Ion is a current for which the on-state voltage Von of the semi-conductor is sensitive to the temperature and Tc is the temperature of the casing of said semi-conductor element; •—Measuring and storing at least one parameter set Von, Ion, Tc of said at least one stable operating condition; •—in a calculating unit (52), providing calculations for minimizing the error between a junction temperature estimation Tj of an electrical model Tj=F(Von, Ion, θelec) comprising a first set of unknown parameters θelec and another junction temperature estimation Tjmod of a loss/thermal model Tj=G(lon, Tc, θ mod) comprising a second set of unknown parameters θ mod and obtaining at least one set of parameters θelec and at least one parameter θ mod providing minimization of said error; •—providing the calculated value of Tj with at least one of the calculated parameters sets θelec and/or θ mod and the measured Von, Ion, Tc; •—Storing the at least one parameters set θelec and/or θ mod and/or Tj.

A method for monitoring an ideal diode comprises controlling a source-gate voltage of a MOSFET of the ideal diode such that the ideal diode can be changed between an off and an on state with a first target value for a source-drain voltage. To detect error states, the source-drain voltage and the source-gate voltage are measured. A check is carried out to determine whether the source-drain voltage reaches the first target value within predefined error limits in the on state. A test mode is carried out, in which a second target value which smaller than the first target value is set for the source-drain voltage. A check is carried out to determine whether the source-gate voltage reaches an upper threshold value when the test mode is being carried out. An error signal is output when the first target value and/or the upper threshold value is/are not reached.

The disclosure describes to techniques for detecting field failures or performance degradation of circuits, including integrated circuits (IC), by including additional contacts, i.e. terminals, along with the functional contacts that used for connecting the circuit to a system in which the circuit is a part. These additional contacts may be used to measure dynamic changing electrical characteristics over time e.g. voltage, current, temperature and impedance. These electrical characteristics may be representative of a certain failure mode and may be an indicator for circuit state-of-health (SOH), while the circuit is performing in the field.

A method analyzes an operation of a power semiconductor device. The method includes: providing a set of reference voltages of the device and a set of corresponding reference currents; measuring, within a predetermined time-interval, Nframe on-state voltages and Nframe corresponding on-state currents of the device to obtain Nframe measurement points, Nframe being an integer number equal to or greater than 2; adapting the set of reference voltages by carrying out a least squares fit to the Nframe measurement points; and using the adapted set of reference voltages to analyze the operation of the power semiconductor device.

The present invention discloses an asymmetrical PN junction thermoelectric couple structure and its parameter determination method. By changing the structural parameters of p-type semiconductor or n-type semiconductor, the current generated by p-type semiconductor is equal to the current generated by the n-type semiconductor, so that the high-efficiency output of PN junction thermoelectric couple can be realized. Meanwhile, the present invention provides a method for determining the parameters of PN junction based on the numerical solution method. Finally, the optimal size parameters of PN junction are obtained.

A system for detecting a fault in electric power conversion equipment having an input stage and an output stage includes an output voltage sensor positioned within the output stage and configured to generate an output voltage signal; an input current sensor positioned at the input stage and configured to generate an input current signal; and a processor configured to analyze the output voltage signal and the input current signal to determine an occurrence of the fault in the electric power conversion equipment.

A system for detecting a fault in electric power conversion equipment having an input stage and an output stage includes an output voltage sensor positioned within the output stage and configured to generate an output voltage signal; an input current sensor positioned at the input stage and configured to generate an input current signal; and a processor configured to analyze the output voltage signal and the input current signal to determine an occurrence of the fault in the electric power conversion equipment.

An optically-monitored and/or optically-controlled electronic device is described. The device includes at least one of a semiconductor transistor or a semiconductor diode. An optical detector is configured to detect light emitted by the at least one of the semiconductor transistor or the semiconductor diode during operation. A signal processor is configured to communicate with the optical detector to receive information regarding the light detected. The signal processor is further configured to provide information concerning at least one of an electrical current flowing in, a temperature of, or a condition of the at least one of the semiconductor transistor or the semiconductor diode during operation.

An exemplary embodiment of the present inventive concept provides a display device including: a display area where an image is displayed; a peripheral area disposed outside the display area; a hole area disposed within the display area; a hole crack detection line disposed adjacent to the hole area to surround the hole area and having a first end and a second end that is separated from the first end; a first detection line extending from the peripheral area and connected to the hole crack detection line to constitute a first closed circuit; a second detection line extending from the peripheral area and connected to the hole crack detection line to constitute a second closed circuit; and a circuit portion connected to the first detection line and the second detection line.