A method of characterizing a wide-bandgap semiconductor material is provided. A substrate is provided, which includes a layer stack of a conductive material layer, a dielectric material layer, and a wide-bandgap semiconductor material layer. A mercury probe is disposed on a top surface of the wide-bandgap semiconductor material layer. Alternating-current (AC) capacitance of the layer stack is determined as a function of a variable direct-current (DC) bias voltage across the conductive material layer and the wide-bandgap semiconductor material layer. A material property of the wide-bandgap semiconductor material layer is extracted from a profile of the AC capacitance as a function of the DC bias voltage.

An impedance measurement jig may include a first contact plate, a second contact plate, a cover plate, a plug, and an analyzer. The first contact plate may make electrical contact with an ESC in a substrate-processing apparatus. The second contact plate may make electrical contact with a focus ring configured to surround the ESC. The cover plate may be configured to cover an upper surface of the substrate-processing apparatus. The plug may be installed at the cover plate to selectively make contact with the first contact plate or the second contact plate. The analyzer may individually apply a power to the first contact plate and the second contact plate through the plug to measure an impedance of the ESC and an impedance of the focus ring. Thus, the impedances of the ESC and the focus ring may be individually measured to inspect the ESC and/or the focus ring.

The present disclosure relates to a steady-state microwave conductivity method that includes modulating a light beam to form an amplitude modulated light having a modulation frequency ω.sub.1, producing a microwave waveform, exposing a sample to the amplitude modulated light and a first portion of the microwave waveform to produce an amplitude modulation signal on the first portion of the microwave waveform, and mixing a second portion of the microwave waveform and the amplitude modulation signal to produce a first signal and a second signal.

Disclosed are a method and apparatus for determining electrical characteristics of a transistor, and a computer-readable storage medium. The method for determining electrical characteristics of a transistor includes: determining mobility characteristics of carriers in channels of the transistor at a transistor operating temperature condition; and determining electrical characteristics of the transistor based on the mobility characteristics of the carriers, semiconductor material properties of the transistor, and structural features of the transistor.

[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.

[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.

Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG. The physical contacting to the topside of the wafer is noncontaminating and noninvasive to the semiconductor layers.

To measure the resistance area product of a high resistivity layer using a microscopic multi point probe, the high resistivity layer is sandwiched between two conducting layers. A plurality of electrode configurations/positions is used to perform three voltage or resistance measurements. An equivalent electric circuit model/three layer model is used to determine the resistance area product as a function of the three measurements.

The present invention provides a detection method for sensitive parts of ionization damage in a bipolar transistor, which includes the following steps: selecting an irradiation source, and carrying out irradiation test on the bipolar transistor to be tested; installing the irradiated bipolar transistor on a test bench of a deep level transient spectroscopy system, and setting test parameters; selecting at least two different bias voltages, and testing the bipolar transistor to obtain a deep level transient spectrum; determining whether a defect is an ionization defect according to a peak position of the defect signal in the deep level transient spectrum; determining the defect type as oxidation trapped charges or an interface state according to the level of the defect signal in the deep level transient spectrum; and determining the sensitive area of ionization damage in the bipolar transistor according to the determination result of the defect signal type.

A method for determining electronic band structure includes partitioning, based on a location of each of a plurality of atoms forming a crystalline structure, a volume of the crystalline structure to obtain Voronoi tessellations. The method also includes constructing, based on the Voronoi tessellations, a plurality of crystal graphs and deriving, based on the plurality of crystal graphs, one or more local structural features of the crystalline structure. The method also includes feeding, into a trained machine-learning model, the one or more local structural features, one or more global structural features of the crystalline structure, and one or more species-based features of the crystalline structure. The trained machine-learning model, in response to said feeding, returns a plurality of energy values that sample a Brillouin zone of the crystalline structure.

The multilayer test sample includes a stack with a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers. The multilayer test sample has terminals below the stack for measuring on the stack. The terminals have unknown positions or distance between them. A model and a measurement strategy is defined so that material parameters of the stack may be determined.