Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.

An electronic device and a method for operating an electronic device are provided. The electronic device includes a first circuit board, a second circuit board, a signal line connecting the first circuit board and the second circuit board, a processor disposed on the first circuit board and outputting a pulse signal through the signal line, a parasitic capacitance pattern disposed around the signal line and generating a parasitic capacitance by the pulse signal, and an amplifier disposed on the second circuit board and amplifying a signal generated by the parasitic capacitance, wherein the processor identifies whether the signal line is abnormal, based on the amplified signal obtained from the amplifier.

A module substrate for a semiconductor module includes: a wiring substrate having an upper surface and a lower surface opposite to the upper surface, wherein the wiring substrate includes a circuit wiring and a plurality of via holes extending from the upper surface to the lower surface in a thickness direction; a plurality of test terminals respectively provided on the via holes and electrically connected to the circuit wiring, and a fastening thin film provided on the wiring substrate and covering the via holes, wherein the fastening thin film has a predetermined thickness such that a portion of the fastening thin film is penetrated when an interface is pin is inserted into the portion of the fastening thin film through the via hole from the upper surface, and the portion of the penetrated fastening thin film holds the penetrating interface inspection pin.

A self-test system for PCIe and a method thereof are disclosed. In the system, a first circuit interconnect card and a second circuit interconnect card are inserted into CEM slots, respectively, and the first circuit interconnect card and the second circuit interconnect card are electrically connected to each other through a FFC, the central processing unit generates and provides differential signals to the first circuit interconnect card and the second circuit interconnect card; the first circuit interconnect card or the second circuit interconnect card provide differential signals to the second circuit interconnect card or the first circuit interconnect card through the first FFC interface and the second FFC interface, respectively, and the second circuit interconnect card or the first circuit interconnect card provides the differential signals to a central processing unit, so as to implement self-check for PCIe.

A method of debugging a printed circuit board with at least one boundary-scan compliant device is presented. The method uses an electronic processing unit and includes the steps of: retrieving boundary-scan properties of the at least one boundary-scan compliant device, the properties including a listing of boundary-scan compliant circuit terminals of the at least one boundary-scan compliant device; retrieving connectivity properties; selecting and displaying a circuit graph of at least a part of the devices mounted on the printed circuit board, the circuit graph including at least one of the devices mounted on the printed circuit board and a least one further device from the devices which has a circuit terminal interconnected to a circuit terminal of the device for visualizing at least the device, the further device and interconnects between the circuit terminals of the devices.

A system detects cracks in solder joints on a printed circuit board (PCB). The system includes a device, a signal generator, a termination resistor, and a detector. The device includes a first contact and a second contact coupled to the first contact. The device is soldered to the PCB by a first solder joint at the first contact and by a second solder joint at the second contact. The signal generator has a test signal output coupled to the first solder joint. The termination resistor has a first terminal coupled to the second solder joint, and a second terminal coupled to a ground plane of the PCB. The detector receives a reflected signal that is a reflection of the test signal from at least one of the first solder joint, the second solder joint, and the termination resistor. The detector provides an indication as to whether or not at least one of the first solder joint and the second solder joint is cracked based upon a magnitude of the reflected signal.

An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.

Techniques for environmental contaminant monitoring are disclosed. In some embodiments, a contaminant detection system electronically instigates a test circuit that shares an environment with another circuit to induce an electrical anomaly in the test circuit when environmental contamination is present. While electronically instigating the first circuit, the contaminant detection system monitors for an electrical anomaly indicative of the environmental contamination. Responsive to detecting an electrical anomaly in the test circuit that is indicative of environmental contamination, the contaminant detection system generates an alert that indicates that the second circuit has likely been exposed to the environmental contamination. The contaminant detection system may provide early warning of potentially caustic environments before creep corrosion or similar phenomena manifest in expensive hardware resources. Thus, hardware outages may be mitigated or avoided.

A method for estimating degradation of a wire-bonded power semi-conductor module is provided. The method includes obtaining an indicator of degradation (Degr.sub.est_t-1); estimating an estimated indicator of degradation (Degr.sub.est_t) by a temporal degradation model; obtaining a set of on-line measure (X.sub.on_meas_t); then, (1) converting the on-line measure (X.sub.on_meas_t) into a deducted indicator of degradation (Degr.sub.meas_t) by an electrical equivalence model, and (2) computing a deviation between estimated and deducted indicator of degradation (Degr.sub.est_t; Degr.sub.meas_t); and/or (1) converting the estimated indicator of degradation (Degr.sub.est_t) into a set of on-line estimation (X.sub.on_est_t), and (2) computing a deviation between set of on-line measure and estimation (X.sub.on_meas_t; X.sub.on_est_t); and correcting the estimated indicator of degradation (Degr.sub.est_t) into a corrected estimated indicator of degradation (Degr.sub.corr_t) as a function of the computed deviation.

A module type sensor includes a casing including a casing upper surface, a first casing side surface which is bent downward from the casing upper surface and has a lower end upwardly separated from a path through which a transmission line passes, and a second casing side surface which is bent downward from the casing upper surface and has a fixing bracket extending by being outwardly bent; a body unit fixedly installed inside the casing, formed of an insulator, supported by the printed circuit board at a lower end, and having, at a center, an opening which is open toward the transmission line; and a sensing substrate unit fixedly installed on an upper portion of the body unit, and including a voltage sensing circuit which is capacitively coupled to the transmission line exposed through the opening and a current sensing circuit which is inductively coupled to the transmission line.