G01R31/2884

A Method, a Device and a Computer Program for Operating a Modular Test Bench Comprising at Least One Test Bench Circuit to Test a Test Object
20230047570 · 2023-02-16 · ·

An embodiment of a method for operating a modular test bench is disclosed, wherein the modular test bench comprises at least one test module to test a test object. The method comprises receiving first information on a hardware revision and on a software revision of the test module and receiving second information on a hardware revision and on a software revision of the test object. The method further comprises determining, if the combination of the first information and the second information fulfills a predetermined criterion and outputting a check signal, enabling the use of the test bench if the combination of the first information and the second information fulfills the predetermined criterion.

SEMICONDUCTOR INTEGRATED CIRCUIT
20230052283 · 2023-02-16 · ·

A semiconductor integrated circuit includes: one input terminal; multiple output terminals; multiple first current control elements connected between the input terminal and the respective output terminals; a control circuit that controls the first current control elements; a fault detection circuit that includes multiple voltage comparator circuits each of which compares a voltage proportional to a voltage of one of the output terminals with a predetermined threshold voltage and that detects an open-circuit state or a short-circuit state of the output terminals; an external terminal connected to an external resistor; a voltage convertor circuit that generates the threshold voltage according to a voltage of the external terminal that is generated by flowing a current through the external resistor, the threshold voltage being applied to an input terminal of each of the voltage comparator circuits; and a detection result output terminal for outputting a detection result by the fault detection circuit.

Monitoring circuit and semiconductor device
11579188 · 2023-02-14 · ·

Embodiments of the present disclosure relate to a monitoring circuit and a semiconductor device, and particularly, to a monitoring circuit including an oscillation circuit configured to generate an oscillation signal having a rising characteristic or a falling characteristic according to a threshold voltage level and a counter configured to count the number of rises or the number of falls of the oscillation signal, and a semiconductor device including the monitoring circuit.

SOLID STATE ESD SIC SIMULATOR
20230040961 · 2023-02-09 · ·

Electrostatic discharge (ESD) test systems include a FET-based pulse generator using pairs of back-to-back FETs coupled to produce an ESD pulse based on discharging a capacitor that is coupled in series with a device under test (DUT). A number of FETs can be selected based on an intended ESD test voltage magnitude.

Semiconductor integrated circuit device
11555847 · 2023-01-17 · ·

A semiconductor integrated circuit device includes a control unit configured to control a switching element or an output transistor of a power supply device, a monitor terminal for monitoring an output voltage of the power supply device, a test unit configured to output a test signal to the monitor terminal before activation of the power supply device, and a determination unit configured to determine whether or not the monitor terminal is open, on the basis of a voltage of the monitor terminal when the test unit outputs the test signal to the monitor terminal.

Test circuit and method

A test circuit includes an oscillator configured to generate an oscillation signal, a device-under-test (DUT) configured to output an AC signal based on the oscillation signal, a first detection circuit configured to generate a first DC voltage having a first value based on the oscillation signal, and a second detection circuit configured to generate a second DC voltage having a second value based on the AC signal.

System and method for testing radiation susceptibility capable of simulating impact of a radiation wave to a device under test

Abstract of Disclosure A method for testing radiation susceptibility includes transmitting radiation wave to a device under test, measuring the device under test to generate a first voltage according to the radiation wave, outputting a reference voltage to a coupling device so that the coupling device generates a second voltage according to the reference voltage, adjusting the reference voltage so that the second voltage approximates the first voltage, storing the adjusted reference voltage, outputting the second voltage to the device under test according to the adjusted reference voltage to simulate an impact of the radiation wave to the device under test, the device under test accordingly transmitting a control signal to the coupling device after receiving the second voltage, and determining a status of the device under test according to the control signal.

ON-CHIP MONITOR CIRCUIT AND SEMICONDUCTOR CHIP

Provided is an on-chip monitor circuit mounted on a semiconductor chip that is equipped with a security function module for performing a security function process on an input signal and outputting a security function signal, the on-chip monitor circuit comprising a monitor circuit for monitoring signal waveforms of the semiconductor chip, wherein the circuit is provided with a first storage means for storing data that designates a window period in which to perform a test of the semiconductor chip, and a control means for performing control to operate the circuit during the window period, when a prescribed test signal is inputted to the security function module. By using the on-chip monitor circuit in a semiconductor chip of which security is required, security attacks, e.g., a Trojan horse or the like, intended to embed a malicious circuit in the production stage of security function module-equipped semiconductors chips, can be prevented.

SEMICONDUCTOR DEVICE
20180012814 · 2018-01-11 ·

A semiconductor device includes first and second pads separated from each other, first and second test elements connected to the first and second pads and connected to each other in parallel between the first and second pads, a first diode connected to the first test element in series, and a second diode connected to the second test element in series.

Magnetic Field Sensor With Shared Path Amplifier And Analog-To-Digital-Converter

A magnetic field sensor comprises at least one magnetic field sensing element configured to generate a measured magnetic field signal responsive to an external magnetic field; a diagnostic circuit configured to generate a diagnostic signal, wherein the diagnostic signal is not dependent on a measured magnetic field; a signal path comprising an amplifier and an analog-to-digital converter for processing the measured magnetic field signal to generate a sensor output signal indicative of the external magnetic field during a measured time period and for processing the diagnostic signal during a diagnostic time period; and a switch coupled to receive the measured magnetic field signal and the diagnostic signal and direct the measured magnetic field signal to the signal path during the measured time period and direct the diagnostic signal to the signal path during the diagnostic time period.