A sensor test apparatus capable of efficiently testing a sensor is provided. A sensor test apparatus 30 which tests the pressure sensor 90 includes an application unit 40 including an application device 42 including a socket 445 to which the sensor 90 is electronically connected, a pressure chamber 43 which applies pressure to the sensor 90, and a heat sink 443,462 which applies a thermal stress to the sensor 90, the test unit 35 which tests the sensor 90 via the socket 445, and the conveying robot 33 which conveys the sensor 90 into and out of the application unit 40.

The semiconductor inspecting method includes following steps. First, a first position of a probe needle from above is defined by adopting a vision system of a semiconductor inspecting system. Then, a first relative vertical movement between the probe needle and the pad is made by adopting a driving system of the semiconductor inspecting system. Thereafter, a minimum change in position of the probe needle corresponding to the first position is recognized by adopting the vision system of the semiconductor inspecting system. Next, the first relative vertical movement is stopped by adopting the driving system of the semiconductor inspecting system.

Disclosed herein are thermal heads and corresponding test systems for independently controlling a one or more components while testing one or more devices under test. In some embodiments, a thermal head comprises a plurality of adapters, one or more heaters, and one or more thermal controllers for independently controlling temperatures of the components. The thermal controllers may control the temperatures of at least some of the components independently such that thermal control of one component does not affect the thermal control of the other component. In some embodiments, the thermal control is by way of one or more cold plates, and the thermal head comprises one or more cold plates. Embodiments of the disclosure further include independent control of one or more forces using one or more force mechanisms.

A method for controlling temperature in a temperature control system. The method includes providing a temperature control system including a controller, a first contactor assembly having a first channel system, a plurality of first contacts, each of the first contacts including a portion that is disposed within the first channel system, and one or more of a first exhaust valve or a first inlet valve, and a second contactor assembly having a second channel system, a plurality of second contacts, each of the second contacts including a portion that is disposed within the second channel system, and one or more of a second exhaust valve or a second inlet valve. The method also includes receiving, by the first contactor assembly, a fluid at a first temperature. The method also includes receiving, by the second contactor assembly, the fluid at the first temperature.

Embodiments of the present application disclose a fixing device and fixing method for chip test and a chip tester. The fixing device for chip test includes: a carrier with a fixing chamber for fixing a chip formed inside, a plurality of adjustors being disposed on sidewalls of the fixing chamber and configured to be extended or retracted to adjust a position of the chip in two orthogonal directions within a horizontal plane; and a top cover configured to cooperate with the carrier to fix the chip in a vertical direction, wherein at least one adjustable pressing cover is disposed at a bottom of the top cover, so as to autonomously adjust a pressing force applied to the chip by the pressing cover in the vertical direction. The present application is suitable for fixing chips with various overall dimensions, and can adaptively adjust a pressing force.

The present disclosure is an inspection apparatus that makes an inspection of electrical characteristics of an object to be inspected. using a contactor brought into electrical contact with an electrode of the object to be inspected, the inspection apparatus including: a position adjusting unit including the contactor, a position adjusting section that adjusts a tip position of the contactor, and a load. detecting section that detects a value of contact load between the contactor and the electrode; a position deriving section that derives an initial position of the contactor in a specific direction based on a relationship between an amount of contact displacement of the contactor in the specific direction and the value of contact load between the contactor and the electrode; and a movement performing section that moves the tip position of the contactor based on the initial position in the specific direction derived by the position deriving section.

A jig (30) includes a first block portion (100) at which a probe head (300) is installed, and a first suction port (112) formed on the first block portion (100). Air present on a side where one end of a probe (330) provided in the probe head (300) is located is sucked from the first suction port (112).

A method for the testing of optoelectronic chips which are arranged on a wafer and have electrical interfaces in the form of contact pads and optical interfaces which are arranged to be fixed relative thereto in the form of optical deflection elements, e.g., grating couplers, with a specific coupling angle. The wafer is adjusted in three adjustment steps with one of the chips relative to a contacting module such that the electrical interfaces of the chip and contacting module contact one another, and the optical interfaces of the chip and contacting module occupy a maximum position of the optical coupling.

There is provided an alignment method of a probe card including a plurality of probe groups provided corresponding to a plurality of chips, comprising: a first mode for calculating a gradient and a center of a probe group based on position information of two or more probes included in the probe group for each of the plurality of chips and calculating a gradient and a center of the probe card based on the calculated grandients and the calculated centers of the plurality of probe groups.

In some embodiments, a semiconductor wafer testing system is provided. The semiconductor wafer testing system includes a semiconductor wafer prober having one or more conductive probes, where the semiconductor wafer prober is configured to position the one or more conductive probes on an integrated chip (IC) that is disposed on a semiconductor wafer. The semiconductor wafer testing system also includes a ferromagnetic wafer chuck, where the ferromagnetic wafer chuck is configured to hold the semiconductor wafer while the wafer prober positions the one or more conductive probes on the IC. An upper magnet is disposed over the ferromagnetic wafer chuck, where the upper magnet is configured to generate an external magnetic field between the upper magnet and the ferromagnetic wafer chuck, and where the ferromagnetic wafer chuck amplifies the external magnetic field such that the external magnetic field passes through the IC with an amplified magnetic field strength.