Patent classifications
G01R31/303
X-ray filter
Embodiments may relate an x-ray filter. The x-ray filter may be configured to be positioned between an x-ray source output and a device under test (DUT) that is to be x-rayed. The x-ray filter may include at least 80% titanium (Ti) by weight. Other embodiments may be described or claimed.
X-ray filter
Embodiments may relate an x-ray filter. The x-ray filter may be configured to be positioned between an x-ray source output and a device under test (DUT) that is to be x-rayed. The x-ray filter may include at least 80% titanium (Ti) by weight. Other embodiments may be described or claimed.
Immunity evaluation system and immunity evaluation method
Provided is an immunity evaluation system that enables design feedback in consideration of a subject wiring and an improvement amount for improving an electromagnetic noise resistance of a circuit board. An immunity evaluation device includes: a storage unit configured to store characteristic data including probe-circuit board wiring coupling characteristics which are determined by a combination of a near-field probe and circuit board characteristics, and a test result; and an IC reaching signal level estimation unit configured to estimate a signal level reaching a terminal of an evaluation target IC. The immunity evaluation device receives board design information, information of the near-field probe, and test waveform instruction information of a signal applied to the near-field probe. The IC reaching signal level estimation unit reads the coupling characteristics from the storage unit based on the board design information of a test subject circuit board and the information of the near-field probe, and outputs a value of the IC reaching signal level reaching a terminal of the evaluation target IC from the board design information of the test subject circuit board, the information of the near-field probe, and the coupling characteristics.
INSPECTION JIG AND CIRCUIT BOARD INSPECTION APPARATUS INCLUDING THE SAME
A circuit board inspection apparatus includes an inspection processing portion that inspects an electric circuit of a board to be inspected, an inspection jig, and a position detector used to position the inspection processing portion relative to the board to be inspected. The inspection jig includes a probe unit having a probe, a first board, a second board located in parallel with the first board in a thickness direction of the first board, an electrical connection portion that electrically connects the first board and the second board, and a second board holding portion that holds the second board from the first board and holds the probe unit on a side opposite to the first board side. The second board holding portion has a position detection opening penetrating in the thickness direction, at a position overlapping the position detector as viewed from the thickness direction of the second board holding portion.
TESTING APPARATUS AND METHOD
A capacitive test apparatus for testing an electronic device contained within a package, the apparatus comprising: a plurality of conductive pads in electrical communication with the processor, wherein the plurality of conductive pads are configured to align with electrodes of the electronic device during testing and capacitively couple electrical stimuli to the electrodes via the package; processing circuitry configured to: apply the electrical stimuli to the plurality of conductive pads; receive one or more response signals induced by the electrical stimuli coupled through the package; and determine one or more electrical characteristics of the electronic device based on the one or more response signals.
Opto electrical test measurement system for integrated photonic devices and circuits
An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
Opto electrical test measurement system for integrated photonic devices and circuits
An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
Crosstalk suppression in wireless testing of semiconductor devices
An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die.
Crosstalk suppression in wireless testing of semiconductor devices
An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die.
Semiconductor device and wafer with reference circuit and related methods
A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.