An optoelectronic device includes an optoelectronic die, a laser die, and electrical interconnects. The optoelectronic device has a surface. A trench having first and second walls and a floor is formed in the surface, and an electrically conductive layer extends from the floor, via the first wall, to the surface. The laser die includes first and second electrodes and a laser output aperture. The laser die is mounted in the trench and is configured to emit a laser beam. The first electrode is coupled to the electrically conductive layer and the laser output aperture is mechanically aligned with a waveguide that extends from the second wall. The interconnects are formed on the second electrode of the laser die and on selected locations on the surface of the optoelectronic die. The interconnects are coupled to a substrate, and are configured to conduct electrical signals between the optoelectronic die and the substrate.

A casing for housing a fiber optic transceiver for use in a fiber optic connector can include a top surface, a bottom surface and one or more lateral surfaces, wherein the top surface and at least one or more lateral surfaces are at least in parts electrically conductive, and wherein the bottom surface of the casing comprises one or more solder pads.

A first photonic die has a first coupling edge and a first die surface, and comprises: a first waveguide extending in proximity to the first coupling edge; a portion of the first die surface forming an alignment edge substantially parallel to the first waveguide; and a first alignment feature etched into or formed adjacent to the first coupling edge. A second photonic die has a second coupling edge and a second die surface, and comprises: a second waveguide extending in proximity to the second coupling edge; a portion of the second die surface configured to form a receptacle sized to constrain a position of the alignment edge; and a second alignment feature etched into or formed adjacent to the second coupling edge and configured to enable alignment with the first alignment feature when the first photonic die and the second photonic die are substantially aligned with each other.

A photonic integrated circuit including multiple elements formed by different processes onto separate chips can be manufactured by defining, via photolithography processes for example, complementary geometries onto each separate chip. Thereafter, the complementary geometries can be aligned and engaged, thereby optically and mechanically intercoupling the several chips to define a single photonic integrated circuit.

A hybrid multi-layered optical flexible printed circuit device, comprising: an optical flexible substrate including a first open window and a second open window with a first, a second surfaces opposite to each other; an intrinsic film including a first bonding region aligned with the first open window and a second bonding region aligned with the second open window formed on the first surface; an optical waveguide film including a first notch with a first slant surface aligned with the first bonding region, and a second notch with a second slant surface aligned with the second bonding region formed on the second surface and encompassed the first open window and the second open window; a first flexible printed circuit board formed on the optical waveguide film; and a first optoelectronic device and a second optoelectronic device mounted in the first bonding region and the second bonding region of the intrinsic film.

A semiconductor device includes a photonic die and an optical die. The photonic die includes a grating coupler and an optical device. The optical device is connected to the grating coupler to receive radiation of predetermined wavelength incident on the grating coupler. The optical die is disposed over the photonic die and includes a substrate with optical nanostructures. Positions and shapes of the optical nanostructures are such to perform an optical transformation on the incident radiation of predetermined wavelength when the incident radiation passes through an area of the substrate where the optical nanostructures are located. The optical nanostructures overlie the grating coupler so that the incident radiation of predetermined wavelength crosses the optical die where the optical nanostructures are located before reaching the grating coupler.

In an optical circuit, a substrate can define a cavity that extends into a substrate front surface. A sidewall of the cavity can include a substrate optical port. An optical path can extend through the substrate from a connector optical port to the substrate optical port. A photonic integrated circuit (PIC) can attach to the substrate. A PIC front surface can include a plurality of electrical connections. A PIC edge surface can extend around at least a portion of a perimeter of the PIC between the PIC front surface and a PIC back surface. A PIC optical port can be disposed on the PIC edge surface and can accept or emit an optical beam along a PIC optical axis. The PIC optical axis can be aligned with the substrate optical port when the PIC is attached to the substrate.

Microelectronic assemblies including photonic integrated circuits (PICs), related devices and methods, are disclosed herein. For example, in some embodiments, a photonic assembly may include a PIC in a first layer including an insulating material, wherein the PIC is embedded in the insulating material with an active surface facing up; a conductive pillar in the first layer; an integrated circuit (IC) in a second layer on the first layer, wherein the second layer includes the insulating material and the IC is embedded in the insulating material, and wherein the IC is electrically coupled to the active surface of the PIC and the conductive pillar; an optical component optically coupled to the active surface of the PIC; and a hollow channel surrounding the optical component, the hollow channel extending from the active surface of the PIC through the insulating material in the second layer.

Microelectronic assemblies including photonic integrated circuits (PICs), related devices and methods, are disclosed herein. For example, in some embodiments, a photonic assembly may include a PIC in a first layer having a first surface and an opposing second surface, wherein the first layer includes an insulating material, wherein the PIC has an active side, an opposing backside, and a lateral side substantially perpendicular to the active side and backside, and wherein the PIC is embedded in the insulating material with the active side facing up; an integrated circuit (IC) in a second layer at the second surface of the first layer, wherein the IC is electrically coupled to the active side of the PIC; and an optical component, having a reflector, optically coupled to the lateral side of the PIC and extending at least partially through the insulating material in the first layer along the lateral side of the PIC.

Techniques for efficient alignment of a semiconductor laser in a Photonic Integrated Circuit (PIC) are disclosed. In some embodiments, a photonic integrated circuit (PIC) may include a semiconductor laser that includes a laser mating surface, and a substrate that includes a substrate mating surface. A shape of the laser mating surface and a shape of the substrate mating surface may be configured to align the semiconductor laser with the substrate in three dimensions.