A method for manufacturing an array substrate is provided. The array substrate, by providing a black matrix and a color resist layer on the array substrate and providing the color resist layer on the TFT layer, prevents bad influences on the color resist layer caused by a high temperature TFT process so as to provide a liquid crystal panel with improved displaying quality. The method includes, firstly, forming a black matrix on a substrate, and secondly, implementing a TFT manufacture process on the black matrix, and then forming a color resist layer after the TFT manufacture process. Accordingly, forming both the black matrix and the color resist layer on the array substrate can be achieved, where the color resist layer is formed after the TFT manufacture process to prevent bad phenomenon caused by the high temperature of the TFT process.

A liquid-crystal display including: a gate line extending in a first direction; a gate electrode protruding from the gate line; a gate insulating layer arranged on the gate electrode; an active layer arranged on the gate insulating layer while being insulated from the gate electrode; a data line arranged on the active layer and extending in a second direction; a source electrode protruding from the data line, having a portion overlapping the gate electrode on a plane, and including a plurality of source electrode branches that are separate from each other; a drain electrode being separate from the source electrode, and including a plurality of drain electrode branches, each being arranged between two of the plurality of source electrode branches, and a drain electrode connecting part connecting the plurality of drain electrode branches; a pixel electrode defining a pixel region; a liquid-crystal layer arranged on the pixel electrode.

A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.

A display device and a manufacturing method thereof are provided. The display device includes a first substrate, a first array structure layer disposed on the first substrate, and a second substrate disposed on the first array structure layer. The first array structure layer includes a photosensitive sensor, a touch sensor, and a spacer layer. The touch sensor includes a receiving electrode. The spacer layer is disposed between the photosensitive sensor and the receiving electrode. The receiving electrode is disposed on a side of the spacer layer away from the photosensitive sensor.

A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.

A core, constituted by an amorphous undoped semiconductor (i type), which is formed on a lower clad layer, and a p-type layer and an n-type layer which are disposed on the lower clad layer with the core interposed therebetween and are formed in contact with the core are provided. The core is formed to be thicker than the p-type layer and the n-type layer. The p-type layer and the n-type layer are constituted by single crystal silicon.

A driving substrate is provided. The driving substrate includes a substrate and a thin film transistor disposed on the substrate. The thin film transistor includes a first metal layer, a second metal layer, and a semiconductor disposed between the first metal layer and the second metal layer. The thin film transistor is divided into a first active block and a second active block, the first active block and the second active block are separated by a first gap in a first direction, and the first active block and the second active block are connected by a first bridge.

A display device and a manufacturing method thereof are provided. The manufacturing method of the display device includes: stacking a first substrate, a second substrate and a third substrate to form a liquid crystal display panel and a dimming panel, the liquid crystal display panel including the first substrate and the second substrate, the dimming panel including the second substrate and the third substrate, and forming a first polarizer on a side of the third substrate away from the second substrate. The first polarizer includes a first metal wire-grid polarizer and a transparent protective layer on a side of the first metal wire-grid polarizer away from the third substrate.

A driving substrate is provided. The driving substrate includes a substrate and a thin film transistor disposed on the substrate. The thin film transistor is divided into at least two active blocks. Two adjacent ones of the at least two active blocks are separated from each other by a first gap, and a ratio of the first gap to an average width of the two adjacent ones of the at least two active blocks in a first direction is greater than or equal to 0.1 and less than 0.5.

A capacitive electro-optical modulator includes a silicon layer having a cavity having sidewalls and a floor. A germanium or silicon-germanium strip overlies the silicon layer within the cavity. A silicon strip overlies the germanium or silicon-germanium strip within the cavity. The silicon strip is wider than the germanium or silicon-germanium strip. An insulator fills the cavity laterally adjacent the germanium or silicon-germanium strip and the silicon strip and extending between the sidewalls of the cavity. An upper insulating layer overlies the silicon strip and the insulator. A layer of III-V material overlies the upper insulating layer. The layer of III-V material formed as a third strip is arranged facing the silicon strip and separated therefrom by a portion of the upper insulating layer.