A device for generating individual photons with energy E includes quantum emitters, having at least one determined transition with the energy E from an energy level N* to a lower energy level N1. The emitters are near a propagation path running from first to second regions. The device also includes at least one light source to output light, for propagation along the path. The light has the energy E for resonant excitation of the energy level N*. The emitters are arranged so that optionally exactly Z emitters are illuminated, forming an optical thickness τ>0 for the light along the path. The number Z lies in a range of Z0±10% and Z0 is a number at which a maximum destructive interference in the second region occurs between a two-photon component of the light scattered on the ZO emitters and a two-photon component of the non-scattered light.

A display device includes a pixel connected to a data line, a data pad connected to the data line, and a first test area. The first test area includes a test control line transmitting a test control signal, a test signal line transmitting a test signal, and a first switch connected to the data pad. The first switch includes a gate electrode connected to the test control line, first and second semiconductor layers overlapping the gate electrode, a source electrode connected to the first and second semiconductor layers, and a drain electrode spaced from the source electrode and connected to the first and second semiconductor layers. The source electrode and the drain electrode are connected to the test signal line and data pad, respectively. One of the first or second semiconductor layers includes an oxide semiconductor and the other of the first or second semiconductor layer includes a silicon-based semiconductor.

A display comprises a substrate (e.g., glass), a plurality of pixel circuits disposed on a back surface of the substrate, and a plurality of self-emitting devices disposed on a front surface of the substrate. The self-emitting devices are electrically connected to the plurality of pixel circuits by at least one electrically conductive via traveling through the substrate. Each pixel circuit comprises a first and a second transistor and a capacitor. The self-emitting devices may be LEDs or OLEDs for example.

An optical device includes a silicon substrate, a waveguide formed of a thin film that is laminated on the silicon substrate and that is made of a perovskite oxide with a large electro-optic effect as compared to lithium niobate, and a cladding layer that covers the waveguide. Further, the optical device includes ground electrode that has a ground potential and a signal electrode that is arranged at a position facing the ground electrode and that applies driving voltage to the waveguide.

A core, constituted by an amorphous undoped semiconductor (i type), which is formed on a lower clad layer, and a p-type layer and an n-type layer which are disposed on the lower clad layer with the core interposed therebetween and are formed in contact with the core are provided. The core is formed to be thicker than the p-type layer and the n-type layer. The p-type layer and the n-type layer are constituted by single crystal silicon.

A device for generating individual photons with energy E includes quantum emitters, having at least one determined transition with the energy E from an energy level N* to a lower energy level N1. The emitters are near a propagation path running from first to second regions. The device also includes at least one light source to output light, for propagation along the path. The light has the energy E for resonant excitation of the energy level N*. The emitters are arranged so that optionally exactly Z emitters are illuminated, forming an optical thickness τ>0 for the light along the path. The number Z lies in a range of ZO±10% and ZO is a number at which a maximum destructive interference in the second region occurs between a two-photon component of the light scattered on the ZO emitters and a two-photon component of the non-scattered light.

Methods of manufacturing and operating a monolithically integrated optical phase array (OPA) chip device, and the device itself. A three-dimensional (3-D) integrated optical phase array (OPA) chip device. A system of complementary metal-oxide-semiconductor (CMOS) electronics integrated with a three-dimensional integrated optical array chip device. A method of three-dimension photonic integration to improve optical power in optical phase arrays.

A silicon photonics-based optical modulator is disclosed. The optical modulator includes first radio frequency (RF) metal electrodes that operate as a ground, phase shifters disposed between the first RF metal electrodes for optically modulating an optical signal transmitted along an optical waveguide, second RF metal electrodes disposed between the phase shifters for providing an RF electrical signal received from a driving driver located outside of the optical modulator through one end, resistor-inductors (RL) connected to another end of the second RF metal electrodes, an inductive line disposed between the RLs and a power supply for applying a bias voltage to the optical modulator and the driving driver, and a silicon capacitor disposed between the RLs and the power supply for preventing a degradation of an RF response characteristic of the silicon photonics-based optical modulator caused by the inductive line.

An active matrix substrate includes a first TFT disposed in each of pixel regions, a first flattened layer covering the first TFT, and a pixel electrode provided on the first flattened layer. The first TFT includes a lower gate electrode, a lower gate insulating layer, an oxide semiconductor layer, an upper gate insulating layer, and an upper gate electrode. The active matrix substrate further includes a first connection electrode for electrically connecting a drain contact region of the oxide semiconductor layer and the pixel electrode. The first flattened layer includes a pixel contact hole formed so as to expose a part of the first connection electrode. The bottom face of the pixel contact hole at least partially overlaps, of a lower gate metal layer including a lower gate electrode and an upper gate metal layer including an upper gate electrode, at least the lower gate metal layer when viewed from the normal direction of the substrate. The first connection electrode is formed from a transparent conductive material.

Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.