While a wafer stage moves linearly in a Y-axis direction, surface position information of a wafer surface at a plurality of detection points set at a predetermined interval in an X-axis direction is detected by a multipoint AF system, and by a plurality of alignment systems arranged in a line along the X-axis direction, marks at different positions on the wafer are each detected, and a part of a chipped shot of the wafer is exposed by a periphery edge exposure system. This allows throughput to be improved when compared with the case when detection operation of the marks, detection operation of the surface position information (focus information), and periphery edge exposure operation are performed independently.

A preparation method (100) for a three-dimensional micro-nano morphological structure manufactured by a laser direct writing lithography machine, comprising: step 110, providing a three-dimensional model diagram; step 120, dividing the three-dimensional model diagram in a height direction to obtain at least one height interval; and step 130, projecting the three-dimensional model diagram onto a plane to obtain a mapping relationship, wherein the mapping relationship comprises coordinates, on the plane, corresponding to each point on the three-dimensional model diagram, and wherein the height of each point on the three-dimensional model diagram corresponds to a height value in a corresponding height interval; and making the mapping relationship correspond to an exposure dose according to the mapping relationship, and performing lithography on the basis of the exposure dose. Any three-dimensional micro-nano morphological structure can be obtained. Further disclosed is a three-dimensional micro-nano morphology structure manufactured by a laser direct writing lithography machine.

Some devices, systems, and methods obtain one or more images of a substrate, wherein the substrate includes a feature pattern; determine one or more edges of the feature pattern based on the one or more images; determine an offset of the feature pattern relative to the substrate and an angle of the feature pattern relative to the substrate based on the one or more edges of the feature pattern; and generate a transformation for a drop pattern based on the offset of the feature pattern and on the angle of the feature pattern.

A lithographic apparatus and associated method of controlling a lithographic process. The lithographic apparatus has a controller configured to define a control grid associated with positioning of a substrate within the lithographic apparatus. The control grid is based on a device layout, associated with a patterning device, defining a device pattern which is to be, and/or has been, applied to the substrate in a lithographic process.

A method for forming a circuit board having a dielectric core, a foil top surface, and a thin foil bottom surface with a removable foil backing of sufficient thickness to absorb heat from a laser drilling operation to prevent the penetration of the thin foil bottom surface during laser drilling utilizes a sequence of steps including a laser drilling step, removing the foil backing step, electroless plating step, patterned resist step, electroplating step, resist strip step, tin plate step, and copper etch step, which provide dot vias of fine linewidth and resolution.

A method of fabricating a circuit element, such as a quantum computing circuit element, including obtaining a lithography mask write file that includes mask information characterizing one or more mask features, obtaining a uniformity function that is configured to modify the mask information to compensate for a non-uniform deposition process, applying the uniformity function to the lithography mask write to obtain a modified lithography mask write file, and performing lithography as directed by the modified lithography mask write file.

A method of fabricating a circuit element, such as a quantum computing circuit element, including obtaining a lithography mask write file that includes mask information characterizing one or more mask features, obtaining a uniformity function that is configured to modify the mask information to compensate for a non-uniform deposition process, applying the uniformity function to the lithography mask write to obtain a modified lithography mask write file, and performing lithography as directed by the modified lithography mask write file.

In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

A method of manufacturing a semiconductor device structure is provided. The method includes: providing a substrate; forming a photoresist layer on the substrate; patterning the photoresist layer to form a patterned photoresist layer; forming a pitch adjustment layer on the patterned photoresist layer to define a mask pattern; and determining whether the mask pattern meets a specification of semiconductor fabrication processes; when it is determined that the mask does not meet the specification of semiconductor fabrication processes, performing a rework operation to remove the pitch adjustment layer.

A method for cleaning an edge of a semiconductor wafer in a wafer edge exposure (WEE) apparatus includes positioning the semiconductor wafer having a resist thereon in a wafer positioning device. A brush bar is positioned adjacent a backside of the semiconductor wafer in the wafer positioning device. The brush bar engages and cleans a backside of the semiconductor wafer while the semiconductor wafer is disposed in the wafer positioning device. A height of an edge of the semiconductor wafer is detected. The focusing position of exposure light radiated toward the edge is controlled on the basis of a height of the edge. Exposure light is radiated towards an edge after the cleaning step.