Some implementations described herein include operating components in a lithography system at variable speeds to reduce, minimize, and/or prevent particle generation due to rubbing of or collision between contact parts of the components. In some implementations, a component in a path of transfer of a semiconductor substrate in the lithography system is operated at a relatively high movement speed through a first portion of an actuation operation, and is operated at a reduced movement speed (e.g., a movement speed that is less than the high movement speed) through a second portion of the actuation operation in which contact parts of the component are to interact. The reduced movement speed reduces the likelihood of particle generation and/or release from the contact parts when the contact parts interact, while the high movement speed provides a high semiconductor substrate throughput in the lithography system.

According to one embodiment, a pattern inspection method includes detecting a region of a photomask having a pattern that differs from a corresponding design, acquiring an exposure focus shift information including an exposure focus shift amount of a portion of a substrate corresponding to the detected region of the photomask. The exposure focus shift amount for the detected region is acquired from the exposure focus shift information, and then a pass/fail determination for the detected region is performed based on an estimated pattern to be formed on the substrate.

An information processing apparatus includes an acquisition unit configured to acquire process information about a substrate process, the process information including process data and a process condition, and a display control unit configured to control a display on a display apparatus based on the process information acquired by the acquisition unit, wherein the display control unit selectively displays, on the display apparatus, a first screen that displays the process data of a lot including a plurality of substrates on a lot-by-lot basis and a second screen that displays the process data of a first lot on a substrate-by-substrate basis, the first lot being a lot designated by a user from the lot displayed on the first screen.

Methods for calibrating metrology apparatuses and determining a parameter of interest are disclosed. In one arrangement, training data is provided that comprises detected representations of scattered radiation detected by each of plural metrology apparatuses. An encoder encodes each detected representation to provide an encoded representation, and a decoder generates a synthetic detected representation from the respective encoded representation. A classifier estimates from which metrology apparatus originates each encoded representation or each synthetic detected representation. The training data is used to simultaneously perform, in an adversarial relationship relative to each other, a first machine learning process involving the encoder or decoder and a second machine learning process involving the classifier.

A method of using a dual stage lithographic apparatus, wherein the lithographic apparatus includes: two substrate supports each arranged to move and support a substrate, a measure field in which selectively one of the two substrate supports is positioned to measure a feature of the substrate supported by the respective one of the two substrate supports, and an expose field in which selectively one of the two substrate supports is positioned to expose the substrate supported by the respective one of the two substrate supports to a patterned beam of radiation, the method including thermal relaxation of a substrate loaded on one of the two substrate supports, wherein the thermal relaxation is at least partially performed at the expose field and/or in transfer between the measure field and the expose field.

A method for manufacturing a plurality of mechanical resonators (100) in a manufacturing wafer (10), the resonators being intended to be fitted to an adjusting member of a timepiece, the method comprising the following steps: (a) manufacturing a plurality of resonators in at least one reference wafer according to reference specifications, such manufacture comprising at least one lithography step to form patterns of the resonators on or above the reference wafer and a step of machining in the reference plate using the patterns; (b) for the at least one reference plate, establishing a map indicative of the dispersion of stiffnesses of the resonators relative to an average stiffness value; (c) dividing the map into fields and determining a correction to be made to the dimensions of the resonators for at least one of the fields in order to reduce the dispersion; (d) modifying the reference specifications for the lithography step so as to make the corrections to the dimensions for the at least one field in the lithography step; (e) manufacturing resonators in a manufacturing wafer using the modified specifications.

Disclosed are methods of advanced process control (APC) for particular processes. A particular process (e.g., a photolithography or etch process) is performed on a wafer to create a pattern of features. A parameter is measured on a target feature and the value of the parameter is used for APC. However, instead of performing APC based directly on the actual parameter value, APC is performed based on an adjusted parameter value. Specifically, an offset amount (which is previously determined based on an average of a distribution of parameter values across all of the features) is applied to the actual parameter value to acquire an adjusted parameter value, which better represents the majority of features in the pattern. Performing this APC method minimizes dimension variations from pattern to pattern each time the same pattern is generated on another region of the same wafer or on a different wafer using the particular process.

A method for characterizing post-processing data in terms of individual contributions from processing stations, the post-processing data relating to a manufacturing process for manufacturing integrated circuits on a plurality of substrates using a corresponding processing apparatus for each of a plurality of process steps, at least some of the processing apparatuses each including a plurality of the processing stations, and wherein the combination of processing stations used to process each substrate defines a process thread for the substrate; the method including: obtaining post-processing data associated with processing of the plurality of substrates in a cyclic sequence of processing threads; and determining an individual contribution of a particular processing station by comparing a subset of the post-processing data corresponding to substrates having shared process sub-threads, wherein a process sub-thread describes the process steps of each process thread other than the process step to which the particular processing station corresponds.

A device manufacturing method, the method comprising: obtaining a measurement data time series of a plurality of substrates on which an exposure step and a process step have been performed; obtaining a status data time series relating to conditions prevailing when the process step was performed on at least some of the plurality of substrates; applying a filter to the measurement data time series and the status data time series to obtain filtered data; and determining, using the filtered data, a correction to be applied in an exposure step performed on a subsequent substrate.

A method and system for predicting complex electric field images with a parameterized model are described. A latent space representation of a complex electric field image is determined based on dimensional data in a latent space of the parameterized model for a given input to the parameterized model. The given input may be a measured amplitude (e.g., intensity) associated with the complex electric field image. The complex electric field image is predicted based on the latent space representation of the complex electric field image. The predicted complex electric field image includes an amplitude and a phase. The parameterized model comprises encoder-decoder architecture. In some embodiments, determining the latent space representation of the electric field image comprises minimizing a function constrained by a set of electric field images that could be predicted by the parameterized model based on the dimensional data in the latent space and the given input.