Patent classifications
G03F7/706837
PROCESS WINDOW BASED ON FAILURE RATE
A method for determining a process window of a patterning process based on a failure rate. The method includes obtaining a plurality of features printed on a substrate, grouping, based on a metric, the features into a plurality of groups, and generating, based on measurement data associated with a group of features, a base failure rate model for the group of features, wherein the base failure rate model identifies the process window related to the failure rate of the group of features. The method can further include generating, using the base failure rate model, a feature-specific failure rate model for a specific feature, wherein the feature-specific failure rate model identifies a feature-specific process window such that an estimated failure rate of the specific feature is below a specified threshold.
METHOD FOR OVERLAY ERROR CORRECTION AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE STRUCTURE WITH OVERLAY MARKS
A method for overlay error correction includes generating a first overlay error based on a first overlay mark, wherein the first overlay error is indicative of a misalignment between a lower pattern and an upper pattern of the first overlay mark. The method also includes generating a second overlay error based on a second overlay mark, in response to an abnormal of the first overlay error is detected. The method further includes determining whether the abnormal of the first overlay error is caused by the misalignment between the lower pattern and the upper pattern depending on the second overlay error.
METHOD AND SYSTEM FOR OVERLAY ERROR COMPENSATION AND COMPUTER-READABLE STORAGE MEDIUM
Disclosed are a method and system for overlay error compensation and a storage medium. The method includes that N wafer groups are provided, wherein each wafer group includes M wafers each including a present and previous layer, and N and M are positive integers greater than or equal to 2; for each wafer, a first overlay error is determined according to device structures of the present and previous layers, and a photoetching compensation value is calculated according to the first overlay error; for each wafer group, a first average compensation value is calculated according to photoetching compensation values; a second average compensation value of the N wafer groups is calculated according to first average compensation values; and in response to that the second average compensation value is within a preset range, the second average compensation value is fed to a batch control system to compensate an (N+1).sup.th wafer group.
Expediting spectral measurement in semiconductor device fabrication
A device and method for expediting spectral measurement in metrological activities during semiconductor device fabrication through interferometric spectroscopy of white light illumination during calibration, overlay, and recipe creation.
Method to predict yield of a device manufacturing process
- Alexander Ypma ,
- Cyrus Emil TABERY ,
- Simon Hendrik Celine Van Gorp ,
- Chenxi LIN ,
- Dag SONNTAG ,
- Hakki Ergün Cekli ,
- Ruben Alvarez Sanchez ,
- Shih-Chin Liu ,
- Simon Philip Spencer HASTINGS ,
- Boris MENCHTCHIKOV ,
- Christiaan Theodoor De Ruiter ,
- Peter Ten Berge ,
- Michael James Lercel ,
- Wei Duan ,
- Pierre-Yves Jerome Yvan Guittet
A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including electrical characteristic measurements from previously processed substrates and of process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.
METHOD TO PREDICT YIELD OF A DEVICE MANUFACTURING PROCESS
A method for predicting yield relating to a process of manufacturing semiconductor devices on a substrate, the method including: obtaining a trained first model which translates modeled parameters into a yield parameter, the modeled parameters including: a) a geometrical parameter associated with one or more selected from: a geometric characteristic, dimension or position of a device element manufactured by the process and b) a trained free parameter; obtaining process parameter data including data regarding a process parameter characterizing the process; converting the process parameter data into values of the geometrical parameter; and predicting the yield parameter using the trained first model and the values of the geometrical parameter.
SUB-NANOSCALE HIGH-PRECISION LITHOGRAPHY WRITING FIELD STITCHING METHOD, LITHOGRAPHY SYSTEM, WAFER, AND ELECTRON BEAM DRIFT DETERMINATION METHOD
The invention discloses a sub-nanoscale high-precision lithography writing field stitching method. A photosensitive resist layer is coated on the surface of the wafer to be exposed; after the surface of the photosensitive resist layer is exposed, the exposed pattern will generate a tiny concave-convex structure; the concave-convex structure patterns are identified with a nano contact sensor and can be used as in-situ alignment coordinate markers; by comparing the position coordinates of the writing field before and after exposure and wafer moving, the deviations of stitching can be calculated, and an high-precision lithography stitching of the wafer is performed in a negative feedback control mode, so that the disadvantages of the existing non-in-situ, far-from-writing field and the poor performance of stitching precision in blind type open-loop lithography technology due to the influence of mechanical motion precision of a wafer workbench and long-time drift of an electron beam are overcome.
METHODS AND APPARATUS FOR OBTAINING DIAGNOSTIC INFORMATION RELATING TO AN INDUSTRIAL PROCESS
In a lithographic process, product units such as semiconductor wafers are subjected to lithographic patterning operations and chemical and physical processing operations. Alignment data or other measurements are made at stages during the performance of the process to obtain object data representing positional deviation or other parameters measured at points spatially distributed across each unit. This object data is used to obtain diagnostic information by performing a multivariate analysis to decompose a set of vectors representing the units in the multidimensional space into one or more component vectors. Diagnostic information about the industrial process is extracted using the component vectors. The performance of the industrial process for subsequent product units can be controlled based on the extracted diagnostic information.
Scatterometry modeling in the presence of undesired diffraction orders
A metrology system may receive a model for measuring one or more selected attributes of a target including features distributed in a selected pattern based on regression of spectroscopic scatterometry data from a scatterometry tool for a range of wavelengths. The metrology system may further generate a weighting function for the model to de-emphasize portions of the spectroscopic scatterometry data associated with wavelengths at which light captured by the scatterometry tool when measuring the target is predicted to include undesired diffraction orders. The metrology system may further direct the spectroscopic scatterometry tool to generate scatterometry data of one or more measurement targets including fabricated features distributed in the selected pattern. The metrology system may further measure the selected attributes for the one or more measurement targets based on regression of the scatterometry data of the one or more measurement targets to the model weighted by the weighting function.
Methods and apparatus for obtaining diagnostic information relating to an industrial process
In a lithographic process, product units such as semiconductor wafers are subjected to lithographic patterning operations and chemical and physical processing operations. Alignment data or other measurements are made at stages during the performance of the process to obtain object data representing positional deviation or other parameters measured at points spatially distributed across each unit. This object data is used to obtain diagnostic information by performing a multivariate analysis to decompose a set of vectors representing the units in the multidimensional space into one or more component vectors. Diagnostic information about the industrial process is extracted using the component vectors. The performance of the industrial process for subsequent product units can be controlled based on the extracted diagnostic information.