Patent classifications
G05F1/465
Adaptive voltage scaling scanning method and associated electronic device
The present invention discloses an AVS scanning method, wherein the AVS scanning method includes the steps of: mounting a system on chip (SoC) on a printed circuit board (PCB), and connecting the SoC to a storage unit; enabling the SoC to read a boot code from the storage unit, and executing the boot code to perform an AVS scanning operation on the SoC to determine a plurality of target supply voltages respectively corresponding to a plurality of operating frequencies of the SoC to establish an AVS look-up table; and storing the AVS look-up table into the SoC or the storage unit.
Multi-power supply monitoring, operation, and control
An apparatus comprises a first power supply, a second power supply, and a controller. The first power supply supplies a first input voltage to power a first input of a load over a first circuit path. The second power supply supplies a second input voltage to power a second input of the load over a second circuit path. The controller controls connectivity of the first circuit path to the second circuit path as a function of the first input voltage and the second input voltage during at least ramp up or ramp down of either or both of the first input voltage and the second input voltage.
Switchable power supply
The present disclosure describes a power supply switch that includes a voltage generator, a switch circuit, and a confirmation circuit. The voltage generator is configured to compare a first power supply voltage to a second power supply voltage and to output the first power supply voltage or the second power supply voltage as a bulk voltage (V.sub.bulk). The switch circuit includes one or more transistors and is configured to (i) bias bulk terminals of the one or more transistors with the V.sub.bulk and (ii) output either the first power supply voltage or the second power supply voltage as a voltage output signal. The confirmation circuit is configured to output a confirmation signal that indicates whether the voltage output signal transitioned from the first power supply voltage to the second power supply voltage.
Apparatuses and methods for internal voltage generating circuits
An apparatus is described. The apparatus according to an embodiment includes a voltage dividing resistor circuit formed on a semiconductor substrate and including first and second resistors and first and second selector switches. The first and second resistors and the first and second selector switches are arranged with one of first and second layouts. The first layout is such that the first and second selector switches are placed between the first and second resistors. The second layout is such that the first and second resistors are placed between the first and second selector switches.
Voltage converting circuit and associated chip package and converting method
A non-isolating AC-DC voltage converting system has two voltage converters. The first voltage converter receives a bus voltage and turns on a power transistor when the bus voltage is at valley regions and to provide an interim voltage which is lower than the bus voltage. The second voltage converter receives the interim voltage and provides an output voltage of the AC-DC voltage converting system.
SYSTEM ON CHIP
A system-on-chip is provided. The SoC includes a system power supply circuit which outputs a first supply voltage, an intellectual property (IP) which receives the first supply voltage and operates at a second supply voltage, a supplemental power supply circuit which generates a supplemental voltage; and a comparator which compares the first supply voltage with the second supply voltage and outputs a comparison signal, wherein the supplemental voltage is provided to the IP based on the comparison signal.
Reference voltage generation circuits and related methods
Reference voltage generation circuits and related methods are disclosed. An example reference voltage generation circuit includes a voltage generating circuit including an enhancement mode (E-mode) gallium nitride (GaN) transistor, the voltage generating circuit to, in response to a first clock signal having a first phase, generate a first voltage associated with the E-mode GaN transistor, and, in response to a second clock signal having a second phase different from the first phase, generate a second voltage associated with the E-mode GaN transistor, and a switching capacitor circuit coupled to the voltage generating circuit, the switching capacitor circuit to generate a reference voltage based on a difference between the first voltage and the second voltage.
LDO/Band Gap Reference Circuit
Systems and methods as described herein may take a variety of forms. In one example, systems and methods are provided for a circuit for powering a voltage regulator. A voltage regulator circuit has an output electrically coupled to a gate of an output driver transistor, the output driver transistor having a first terminal electrically coupled to a voltage source and a second terminal electrically coupled to a first terminal of a voltage divider, the voltage divider having an second terminal electrically coupled to ground, and the voltage divider having an output of a stepped down voltage. A power control circuitry transistor has a first terminal electrically coupled to the voltage source, the power control circuitry transistor having a second terminal electrically coupled to the gate terminal of the output driver transistor, and the power control circuitry transistor having a gate terminal electrically coupled to a status voltage signal.
SOFT START MODULE
A soft start module includes a power component, a current sensing component, a reference voltage generating circuit, and a constant current control circuit. The power component has a first terminal connected to a first node, a second terminal connected to an Output node, and a third terminal connected to a third node. The current sensing component has a fourth terminal connected to an input node and a fifth terminal connected to the first node. The reference voltage generating circuit has a seventh terminal connected to a fourth node and an eighth terminal connected to a ground node. The constant current control circuit has a ninth terminal connected directly or indirectly to the fifth terminal of the current sensing component, a tenth terminal connected the fourth node, and an eleventh terminal connected to the third node.
POWER SUPPLY MANAGEMENT DEVICE AND POWER SUPPLY MANAGEMENT METHOD
A power supply management device includes an internal power supply circuit, switches, a comparator circuit, and a control circuit. The internal power supply circuit is configured to output a first supply voltage to a node. The switches are coupled between the node and a plurality of first circuits. The comparator circuit is configured to compare a voltage on the node with a reference voltage when the node does not receive the first supply voltage to generate a flag signal. The control circuit is configured to determine whether the node receives a second supply voltage from an external power supply circuit according to the flag signal. If the node receives the second supply voltage, the control circuit is further configured to turn off the internal power supply circuit and gradually turn on the switches, in order to provide the second supply voltage to the first circuits via the switches.