A transistor semiconductor die includes a first current terminal, a second current terminal, and a control terminal. A semiconductor structure is between the first current terminal, the second current terminal, and the control terminal and configured such that a resistance between the first current terminal and the second current terminal is based on a control signal provided at the control terminal. Short circuit protection circuitry is coupled between the control terminal and the second current terminal. In a normal mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is greater than a voltage of the control signal. In a short circuit protection mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is less than a voltage of the control signal.

A transistor semiconductor die includes a first current terminal, a second current terminal, and a control terminal. A semiconductor structure is between the first current terminal, the second current terminal, and the control terminal and configured such that a resistance between the first current terminal and the second current terminal is based on a control signal provided at the control terminal. Short circuit protection circuitry is coupled between the control terminal and the second current terminal. In a normal mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is greater than a voltage of the control signal. In a short circuit protection mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is less than a voltage of the control signal.

A voltage regulator is provided wherein electricity flows through a second transistor in an operating state in which a control unit) applies an operating voltage to a base of the second transistor. A Zener diode sets, in the operating state, a voltage of a second conductive path to a voltage corresponding to a voltage across the Zener diode. A current corresponding to an addition value obtained by adding a value of a current flowing through a second resistor portion in the operating state, a value of a current flowing through a third resistor portion in the operating state, and a value of a current flowing through the Zener diode in the operating state flows through a ground-side resistor portion. A control unit stops the output of the operating voltage when a voltage of the second conductive path is lower than or equal to a threshold value.

A voltage regulator is provided wherein electricity flows through a second transistor in an operating state in which a control unit) applies an operating voltage to a base of the second transistor. A Zener diode sets, in the operating state, a voltage of a second conductive path to a voltage corresponding to a voltage across the Zener diode. A current corresponding to an addition value obtained by adding a value of a current flowing through a second resistor portion in the operating state, a value of a current flowing through a third resistor portion in the operating state, and a value of a current flowing through the Zener diode in the operating state flows through a ground-side resistor portion. A control unit stops the output of the operating voltage when a voltage of the second conductive path is lower than or equal to a threshold value.

A low voltage drop output regulator and a method for controlling thereof for preventing an inrush current that occurs momentarily during an initial operation of a circuit are described. The low voltage drop output regulator includes a differential amplifier configured to output an amplified voltage by comparing a reference voltage with a feedback voltage, a first MOS transistor configured to output an output voltage to a drain terminal by receiving the amplified voltage in a gate terminal, and an inrush preventer connected between a power voltage terminal and a drive node to prevent the inrush current of the first MOS transistor during an initial operation period. The inrush preventer includes a determining unit and a limiter, and the limiter is configured only by a MOS transistor and a switch connected in series between a power voltage terminal and a drive node.

A low voltage drop output regulator and a method for controlling thereof for preventing an inrush current that occurs momentarily during an initial operation of a circuit are described. The low voltage drop output regulator includes a differential amplifier configured to output an amplified voltage by comparing a reference voltage with a feedback voltage, a first MOS transistor configured to output an output voltage to a drain terminal by receiving the amplified voltage in a gate terminal, and an inrush preventer connected between a power voltage terminal and a drive node to prevent the inrush current of the first MOS transistor during an initial operation period. The inrush preventer includes a determining unit and a limiter, and the limiter is configured only by a MOS transistor and a switch connected in series between a power voltage terminal and a drive node.

An electronic device (10) includes: a power supply (11); a first switch (12) that is connected at least to one pole of the power supply (11) and interrupts power supplied from the power supply (11) to a load (13); a second switch (14) that is positioned on a load (13) side with reference to the first switch (12) and interrupts power supplied from the power supply (11) to the load (13); a first power line (L11) that is connected to one end portion of an electric contact of the second switch (14), the one end portion being located on a first-switch (12) side; a second power line (L12) that is connected to another end portion of the electric contact of the second switch (14); a third power line (L13) that is connected to another pole of the power supply (11); and an electric element (resistor 15) that is connected between the first and second power lines (L11, L12) in parallel to the electric contact or connected between the first and third power lines (L11, L13), such that the electric contact of the second switch (14) is not charged when the first and second switches (12, 14) interrupt power.

An electronic device (10) includes: a power supply (11); a first switch (12) that is connected at least to one pole of the power supply (11) and interrupts power supplied from the power supply (11) to a load (13); a second switch (14) that is positioned on a load (13) side with reference to the first switch (12) and interrupts power supplied from the power supply (11) to the load (13); a first power line (L11) that is connected to one end portion of an electric contact of the second switch (14), the one end portion being located on a first-switch (12) side; a second power line (L12) that is connected to another end portion of the electric contact of the second switch (14); a third power line (L13) that is connected to another pole of the power supply (11); and an electric element (resistor 15) that is connected between the first and second power lines (L11, L12) in parallel to the electric contact or connected between the first and third power lines (L11, L13), such that the electric contact of the second switch (14) is not charged when the first and second switches (12, 14) interrupt power.

A circuit includes a reference voltage generator circuit and a regulation loop circuit having an output voltage terminal. The regulator circuit further includes a fault detection circuit having a first input terminal coupled to the output voltage regulator terminal of the regulation loop circuit. The fault detection circuit asserts, on an output terminal of the fault detection circuit, a fault flag signal responsive to a voltage on the first input terminal falling below a first threshold. A programmable filter is coupled between the reference voltage generator circuit and the regulation loop circuit and is coupled to the fault detection circuit. The programmable filter has a programmable time constant. The programmable filter responds to an assertion of the fault flag signal by decreasing the time constant.

A circuit includes a reference voltage generator circuit and a regulation loop circuit having an output voltage terminal. The regulator circuit further includes a fault detection circuit having a first input terminal coupled to the output voltage regulator terminal of the regulation loop circuit. The fault detection circuit asserts, on an output terminal of the fault detection circuit, a fault flag signal responsive to a voltage on the first input terminal falling below a first threshold. A programmable filter is coupled between the reference voltage generator circuit and the regulation loop circuit and is coupled to the fault detection circuit. The programmable filter has a programmable time constant. The programmable filter responds to an assertion of the fault flag signal by decreasing the time constant.