A power supply circuit in an embodiment includes a first transistor controlled to be turned on and off by a control signal supplied to a gate to output an output voltage following a predetermined voltage, a second transistor, one end of a current path of which is connected to an input terminal for supplying a power supply voltage, the second transistor outputting the predetermined voltage according to the control signal, and an amplifier circuit configured to amplify a voltage difference between a reference voltage and the predetermined voltage, and output the voltage difference as the control signal.

A power supply circuit in an embodiment includes a first transistor controlled to be turned on and off by a control signal supplied to a gate to output an output voltage following a predetermined voltage, a second transistor, one end of a current path of which is connected to an input terminal for supplying a power supply voltage, the second transistor outputting the predetermined voltage according to the control signal, and an amplifier circuit configured to amplify a voltage difference between a reference voltage and the predetermined voltage, and output the voltage difference as the control signal.

A low-dropout (LDO) voltage regulation circuit comprises a first supply voltage, a first transistor, an overshoot control module, and coupling circuitry configured to couple the first supply voltage, the transistor, and the overshoot control module at a first node.

A low-dropout (LDO) voltage regulation circuit comprises a first supply voltage, a first transistor, an overshoot control module, and coupling circuitry configured to couple the first supply voltage, the transistor, and the overshoot control module at a first node.

A low-dropout regulator includes a comparator for comparing a feedback voltage with a reference voltage to output a comparison signal, which corresponds to a comparison result, to a control node; an internal voltage generator coupled to the control node, and for generating the feedback voltage and an internal voltage based on the comparison signal; and a controller coupled to the control node, and for monitoring the internal voltage based on the comparison signal, and controlling a voltage level of the comparison signal according to a monitoring result.

A low-dropout regulator includes a comparator for comparing a feedback voltage with a reference voltage to output a comparison signal, which corresponds to a comparison result, to a control node; an internal voltage generator coupled to the control node, and for generating the feedback voltage and an internal voltage based on the comparison signal; and a controller coupled to the control node, and for monitoring the internal voltage based on the comparison signal, and controlling a voltage level of the comparison signal according to a monitoring result.

A PMOS-output LDO with full spectrum PSR is disclosed. In one implementation, a LDO includes a pass transistor (M.sub.O) having a source coupled to an input voltage (Vin); a noise cancelling transistor (M.sub.D) having a source coupled to the Vin, a gate coupled to a drain and a gate of the pass transistor; a source follower transistor (M.sub.SF) having a source coupled to a drain of the pass transistor, a drain coupled to the drain and gate of the noise cancelling transistor; a current sink coupled between the drain of the source follower transistor and ground; and an error amplifier having an output to drive the gate of the source follower transistor.

An amplifier circuit includes an amplifier and an output transistor. The amplifier is coupled to an output node of the output transistor for providing an output voltage to a load device. The amplifier circuit also includes a slew-rate control circuit coupled to a gate node of the output transistor and configured to control voltage rise of the gate node of the output transistor during power-up to reduce output voltage overshoot.

An amplifier circuit includes an amplifier and an output transistor. The amplifier is coupled to an output node of the output transistor for providing an output voltage to a load device. The amplifier circuit also includes a slew-rate control circuit coupled to a gate node of the output transistor and configured to control voltage rise of the gate node of the output transistor during power-up to reduce output voltage overshoot.

Various embodiments relate to a protection circuit, comprising: a pad configured to input an external voltage from a connector; a first circuit branch connected to the pad and configured to receive a fast ramp-up over voltage at the pad; a second circuit branch connected to the pad and configured to receive a ramp-up over voltage at the pad; a third circuit branch connected to the pad and configured to output an over voltage detection signal when an over voltage is received at the pad, wherein the third circuit branch includes a voltage divider with a variable resistor with a variable voltage node and an enable switch; and a logic circuit including an enabling transistor configured to control the variable resistor and the enable switch.