G05F1/618

Voltage reference buffer circuit

Disclosed is a voltage reference buffer circuit including a first, second, third, and fourth bias generators and a first, second, third, and fourth driving components. The first, second, third, and fourth bias generators generate bias voltages to control the first, second, third, and fourth driving components respectively. The first, second, third, and fourth driving components are coupled in sequence, wherein the first and second driving components are different types of transistors and jointly output a first reference voltage, the third and fourth driving components are different types of transistors and jointly output a second reference voltage, and the group of the first and second driving components is separated from the group of the third and fourth driving components by a resistance load.

Voltage reference buffer circuit

Disclosed is a voltage reference buffer circuit including a first, second, third, and fourth bias generators and a first, second, third, and fourth driving components. The first, second, third, and fourth bias generators generate bias voltages to control the first, second, third, and fourth driving components respectively. The first, second, third, and fourth driving components are coupled in sequence, wherein the first and second driving components are different types of transistors and jointly output a first reference voltage, the third and fourth driving components are different types of transistors and jointly output a second reference voltage, and the group of the first and second driving components is separated from the group of the third and fourth driving components by a resistance load.

Reconfigurable series-shunt LDO
11526186 · 2022-12-13 · ·

A low-dropout regulator (LDO) capable of providing high power-supply rejection ratio (PSRR) and good reverse isolation. The LDO may include a core circuitry and a reverse isolation circuitry. The core circuitry may include a PSRR circuitry coupled to an output node and configured to provide high PSRR at the output node. The reverse isolation circuitry may be configured to provide good reverse isolation at the output node by, for example, providing current in response to ripples at the output node. The reverse isolation circuitry may be configured with bandwidth higher than that of the core circuitry such that it can provide fast transient response. The reverse isolation circuitry may be configurable and/or reconfigurable for a desirable reverse isolation performance. The reverse isolation circuitry may be configurable and/or reconfigurable to trade off between power consumed by the reverse isolation circuitry and a leakage current flowing through the core circuitry.

Constant voltage circuit
11507123 · 2022-11-22 · ·

A constant voltage circuit includes a depletion transistor having a drain, a gate, and a source, the drain connected to a first power supply terminal, and the gate connected to the source, a voltage division circuit connected between the first power supply terminal and an output terminal, a first enhancement transistor having a drain connected to the source of the depletion transistor, a source connected to the output terminal, and a gate connected to an output terminal of the voltage division circuit, a second enhancement transistor having a source connected to the first power supply terminal, a drain connected to the output terminal, and a gate connected to the drain of the first enhancement transistor, and a pull-down element having one end connected to the output terminal and the other end connected to a second power supply terminal.

Device and method for enhancing voltage regulation performance

A device for buffering a reference signal comprises a regulator circuit configured to generate at least two replicas of the reference signal as regulated output signals. The device further comprises a receiving circuit configured to receive the regulated output signals in a switchable manner. In this context, the regulated output signals are configured to have different performance characteristics.

LED DRIVING SYSTEM AND ASSOCIATED CONTROL METHOD
20170374713 · 2017-12-28 ·

A LED driving system has an energy storage component receiving an input voltage, a power switch coupled between the energy storage component and a reference ground, a first output switch coupled between the energy storage component and a first output terminal, a second output switch coupled between the energy storage component and a second output terminal, and a control circuit, wherein the first output terminal produces a first output voltage to supply power for a first LED array, the second output terminal produces a second output voltage to supply power for a second LED array, the control circuit controls a duty cycle of the first output switch according to voltages at cathode terminals of multiple LED strings in the LED array and controls a duty cycle of the second output switch according to voltages at cathode terminals of multiple LED strings in the second LED array.

LED DRIVING SYSTEM AND ASSOCIATED CONTROL METHOD
20170374713 · 2017-12-28 ·

A LED driving system has an energy storage component receiving an input voltage, a power switch coupled between the energy storage component and a reference ground, a first output switch coupled between the energy storage component and a first output terminal, a second output switch coupled between the energy storage component and a second output terminal, and a control circuit, wherein the first output terminal produces a first output voltage to supply power for a first LED array, the second output terminal produces a second output voltage to supply power for a second LED array, the control circuit controls a duty cycle of the first output switch according to voltages at cathode terminals of multiple LED strings in the LED array and controls a duty cycle of the second output switch according to voltages at cathode terminals of multiple LED strings in the second LED array.

LED DRIVING CIRCUIT AND PROTECTION CIRCUIT FOR DC/DC CONVERTOR
20170367162 · 2017-12-21 ·

A protection circuit for an LED driver and a DC/DC converter. The LED driver includes a DC/DC converter and a protection circuit. The DC/DC converter is used to convert the input voltage of the DC voltage input terminal into an output voltage, which comprises a high frequency switch and an inductor. The protection circuit comprises a detection module, a trigger module and a locking module. The detection module is coupled to the inductor for detecting the output voltage and outputting the voltage detection signal. The trigger module is used to receive the voltage detection signal and output a voltage trigger signal when the voltage detection signal is a negative voltage and the absolute value of the negative voltage is greater than or equal to the preset value. The locking module is coupled to the trigger module and stops the high frequency switch from operating after receiving the voltage trigger signal.

LED DRIVING CIRCUIT AND PROTECTION CIRCUIT FOR DC/DC CONVERTOR
20170367162 · 2017-12-21 ·

A protection circuit for an LED driver and a DC/DC converter. The LED driver includes a DC/DC converter and a protection circuit. The DC/DC converter is used to convert the input voltage of the DC voltage input terminal into an output voltage, which comprises a high frequency switch and an inductor. The protection circuit comprises a detection module, a trigger module and a locking module. The detection module is coupled to the inductor for detecting the output voltage and outputting the voltage detection signal. The trigger module is used to receive the voltage detection signal and output a voltage trigger signal when the voltage detection signal is a negative voltage and the absolute value of the negative voltage is greater than or equal to the preset value. The locking module is coupled to the trigger module and stops the high frequency switch from operating after receiving the voltage trigger signal.

Variation-Tolerant Voltage Reference
20170357285 · 2017-12-14 ·

A sub-nW voltage reference is presented that provides inherently low process variation and enables trim-free operation for low-dropout regulators and other applications in nW microsystems. Sixty chips from three different wafers in 180 nm CMOS are measured, showing an untrimmed within-wafer σ/μ of 0.26% and wafer-to-wafer σ/μ of 1.9%. Measurement results also show a temperature coefficient of 48-124 ppm/° C. from −40° C. to 85° C. Outputting a 0.986V reference voltage, the reference operates down to 1.2V and consumes 114 pW at 25° C.