A computing system initialization system includes a computing device that is coupled to a management device and that includes a processing system having at least one register storing debug-message-display-determination instructions, and a memory system that is coupled to the processing system and that includes Basic Input/Output System (BIOS) instructions that, when executed by the processing system, cause the processing system to provide a BIOS engine. The BIOS engine begins initialization operations and, during those initialization operations, generates at least one first debug message. The BIOS engine then accesses the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determines that the at least one first debug message should be displayed. In response, the BIOS engine transmits the at least one first debug message to the management device such that the management device displays the at least one first debug message.

A computing system initialization system includes a computing device that is coupled to a management device and that includes a processing system having at least one register storing debug-message-display-determination instructions, and a memory system that is coupled to the processing system and that includes Basic Input/Output System (BIOS) instructions that, when executed by the processing system, cause the processing system to provide a BIOS engine. The BIOS engine begins initialization operations and, during those initialization operations, generates at least one first debug message. The BIOS engine then accesses the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determines that the at least one first debug message should be displayed. In response, the BIOS engine transmits the at least one first debug message to the management device such that the management device displays the at least one first debug message.

Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBI) technique, is implementable in a vertically-stacked memory module, but is riot limited thereto. The module can be a plurality of memory integrated circuits which are vertically stacked, and which communicate via a bus formed in one embodiment of channels comprising Through-Wafer Interconnects (TWIs), but again is not limited thereto. One such module includes spare channels that are normally used to reroute a data signal on the bus away from faulty data channels. In one disclosed technique, the status of a spare channel or channels is queried, and if one or more are unused, they can be used to carry a DBI bit, thus allowing at least a portion of the bus to be assessed in accordance with a DBI algorithm. Depending on the location and number of spare channels needed for rerouting, DBI can be apportioned across the bus in various manners. Implementations can also be used with other encoding techniques not comprising DBI.

A testing device including a main housing, and a probe housing, wherein the probe housing is rotatably coupled to the main housing. The testing device further includes a first test probe and a second test probe. The first test probe may be configured to be inserted into an alternating-current receptacle. The second test probe is coupled to the probe housing. The second test probe may be configured to be inserted into a universal serial bus receptacle.

A debugging method for a Universal Serial Bus (USB) device includes: receiving input information of a terminal through a Human Interface Device (HID) device; when report ID of the input information is a serial port ID, transmitting the input information to a buffer of a virtual serial port Teletype (TTY) device; and extracting the input information of the terminal from the buffer of the virtual serial port TTY device, executing a shell command on the input information, and returning execution result to the terminal through an original path. The method uses a USB interface to implement a HID device, thereby realizing drive-free execution. In addition, use of the endpoint of the HID device can save endpoints needed for additional debugging and driving.

A line diagnosis method includes, in a situation that a first interface of a first device is connected to a second interface of a second device, obtaining first interface information of the first interface and second interface information of the second interface, and diagnosing a line connection between the first device and the second device based on the first interface information and the second interface information.

A computing system detects an input/output (I/O) device configuration error. The computing system includes at least one I/O device installed with firmware configured to control an I/O function, and a plurality of I/O ports installed on the at least one I/O device. At least one I/O port outputs a request to perform a current I/O configuration initialization and generates current I/O configuration data corresponding to the current I/O configuration initialization. A memory unit is configured to store the current I/O configuration data and previously generated I/O configuration data. The I/O device compares the current I/O configuration data to the previously generated I/O configuration data, and detects the I/O device configuration error in response to determining a mismatch between the current I/O configuration data and the previously generated I/O configuration data.

Implementations of encoding techniques are disclosed. The encoding technique, such as a Data bus Inversion (DBD technique, is implementable in a vertically-stacked memory module, but is not limited thereto. The module can be a plurality of memory integrated circuits which are vertically stacked, and which communicate via a bus formed in one embodiment of channels comprising Through-Wafer Interconnects (TWIs), but again is not limited thereto. One such module includes spare channels that are normally used to reroute a data signal on the bus away from faulty data channels. In one disclosed technique, the status of a spare channel or channels is queried, and if one or more are unused, they can be used to carry a DBI bit, thus allowing at least a portion of the bus to be assessed in accordance with a DBI algorithm. Depending on the location and number of spare channels needed for rerouting, DBI can be apportioned across the bus in various manners. Implementations can also be used with other encoding techniques not comprising DBL

The present disclosure provides a method and an apparatus for detecting a data path, and a storage medium, relates to the technical field of semiconductors, and is applied to a process of detecting a data path of a semiconductor integrated circuit. The method for detecting a data path includes: disconnecting, by a detection apparatus, a connection between a global data line and a local data line in the data path, writing test data into the global data line in the data path via the data path through a write port of the data path, reading, by the detection apparatus, target data of the global data line under a preset condition, and further detecting a defect of the data path according to the test data and the target data.

A method for testing electronic products implemented in an electronic device includes selecting a serial port connected with a slave device in serial communication with a product under test. An activation instruction is transmitted to the slave device, and the electronic product is started through the slave device. Data stored in at least one register of the electronic product and a state of the electronic product is obtained and a capacitance of at least one capacitor in the electronic product is measured. When the electronic product is found to be in an abnormal state, determining a cause of abnormality according to data of the electronic product and the capacitance of the at least one capacitor.