A network overlay system can include a data transport module having a network interface and a translation module configured to generate offload processing addresses for the network packet data; a system bus; at least one host processor connected to the system bus; and at least one offload processor module coupled to the system bus and configured to receive network packet data associated. Offload processor modules include processing circuits associated with at least one of the offload processing addresses that are configured to encapsulate the network packet data for transport on a logical network or decapsulate the network packet data received from the logical network. The offload processing circuits encapsulate or decapsulate network packet data independent of any host processor.

A network overlay system can include a data transport module having a network interface and a translation module configured to generate offload processing addresses for the network packet data; a system bus; at least one host processor connected to the system bus; and at least one offload processor module coupled to the system bus and configured to receive network packet data associated. Offload processor modules include processing circuits associated with at least one of the offload processing addresses that are configured to encapsulate the network packet data for transport on a logical network or decapsulate the network packet data received from the logical network. The offload processing circuits encapsulate or decapsulate network packet data independent of any host processor.

This disclosure is directed to systems, apparatuses, and methods of storing a data entity using at least two sectors of a memory device based at least in part on context information of the data entity. For example, the context information may differentiate between large sequential operations and small random operations, and may further improve multitasking support. The context information may further improve operations to erase data in the memory device. For example, a method may include storing a data entity using at least two sectors of a memory device, the at least two sectors associated with the same data entity, and maintaining, at a memory controller, context information of the data entity comprising a pointer to at least one of the at least two sectors of the memory device. The method may further include erasing the at least two sectors of the memory device using the context information.

A system has at least one bus, a central processing unit (CPU) coupled with the bus, a memory coupled with the bus, a direct memory access (DMA) controller having a plurality of DMA channels and operating independently from the CPU and being coupled with the bus, wherein for access to the bus the DMA controller is programmable in a first mode to have priority over the CPU and in a second mode in which at least one DMA channel of the DMA controller is suspended from accessing the bus.