Patent classifications
G06F13/374
Synchronized processing of process data and delayed transmission
A data bus subscriber and a method for processing data, wherein the data bus subscriber can be connected to a local bus, particularly a ring bus, and the data bus subscriber has an input interface, which can be connected to the local bus, for receiving first local bus data, an output interface, which can be connected to the local bus, for transmitting second local bus data, a processing component for synchronous processing of the first local bus data and/or data stored in a memory and for output of at least one control signal, a logic unit, which is adapted in order to modify a quantity of received first local bus data based on the control signal in order to generate the second local bus data to be transmitted, wherein the logic unit is further adapted for synchronous, delayed transmitting of the second local bus data via the output interface.
Synchronized processing of process data and delayed transmission
A data bus subscriber and a method for processing data, wherein the data bus subscriber can be connected to a local bus, particularly a ring bus, and the data bus subscriber has an input interface, which can be connected to the local bus, for receiving first local bus data, an output interface, which can be connected to the local bus, for transmitting second local bus data, a processing component for synchronous processing of the first local bus data and/or data stored in a memory and for output of at least one control signal, a logic unit, which is adapted in order to modify a quantity of received first local bus data based on the control signal in order to generate the second local bus data to be transmitted, wherein the logic unit is further adapted for synchronous, delayed transmitting of the second local bus data via the output interface.
Propagation delay compensation for SPI interfaces
A method includes receiving a chip select signal at an SPI client device. The method also includes, responsive to receiving the chip select signal, transmitting a first bit of an SPI transmission to an SPI host device, where the first bit of the SPI transmission is transmitted with a delay based at least in part on a loop propagation delay of an SPI channel. The method includes receiving a clock signal at the SPI client device. The method also includes, responsive to receiving the clock signal, transmitting a second bit of the SPI transmission to the SPI host device.
Propagation delay compensation for SPI interfaces
A method includes receiving a chip select signal at an SPI client device. The method also includes, responsive to receiving the chip select signal, transmitting a first bit of an SPI transmission to an SPI host device, where the first bit of the SPI transmission is transmitted with a delay based at least in part on a loop propagation delay of an SPI channel. The method includes receiving a clock signal at the SPI client device. The method also includes, responsive to receiving the clock signal, transmitting a second bit of the SPI transmission to the SPI host device.
Status signal output
A data bus subscriber connected to a local bus, particularly a ring bus. The data bus subscriber has a status signal input for receiving a first status signal value from a downstream data bus subscriber or a terminator, a status signal output for providing a second status signal value to an upstream data bus subscriber or to a local bus master, wherein the data bus subscriber is adapted to provide the second status signal value based on a logical link of a communication readiness of the data bus subscriber and the first status signal value. The invention further relates to a corresponding method and a local bus.
Status signal output
A data bus subscriber connected to a local bus, particularly a ring bus. The data bus subscriber has a status signal input for receiving a first status signal value from a downstream data bus subscriber or a terminator, a status signal output for providing a second status signal value to an upstream data bus subscriber or to a local bus master, wherein the data bus subscriber is adapted to provide the second status signal value based on a logical link of a communication readiness of the data bus subscriber and the first status signal value. The invention further relates to a corresponding method and a local bus.
System and method of arbitrating serial buses of information handling systems
In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may receive first data from a first device via a first two-wire interface (TWI) bus; provide the first data to a second device via a second TWI bus; receive a first arbitration request via an out of band arbitration process from a third device; provide first control information via an in band arbitration process to the first device via the first TWI bus; receive second data from an isolation device via a third TWI bus; provide the second data to the second device via the second TWI bus; receive a second arbitration request via the in band arbitration process from the first device via the first TWI bus; and provide second control information via the out of band arbitration process to the third device.
System and method of arbitrating serial buses of information handling systems
In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may receive first data from a first device via a first two-wire interface (TWI) bus; provide the first data to a second device via a second TWI bus; receive a first arbitration request via an out of band arbitration process from a third device; provide first control information via an in band arbitration process to the first device via the first TWI bus; receive second data from an isolation device via a third TWI bus; provide the second data to the second device via the second TWI bus; receive a second arbitration request via the in band arbitration process from the first device via the first TWI bus; and provide second control information via the out of band arbitration process to the third device.
Controller area network transceiver
A Controller Area Network (CAN) transceiver determines a voltage differential signal from analog signaling and provides a digital output signal at a receiver output to a CAN controller based on the voltage differential signal. The analog signaling received from the CAN bus can operate with a first voltage level scheme of a first CAN protocol and a second voltage level scheme for a second CAN protocol. A first comparator compares the voltage differential signal to a first threshold which is set to a value which differentiates between a logic low bit and logic high bit in accordance with the second CAN protocol. Filtering circuitry selectively filters an output of the first comparator based on detection of noise on the CAN bus to provide a first digital signal indicative of activity on the CAN bus according to the second CAN protocol.
Controller area network transceiver
A Controller Area Network (CAN) transceiver determines a voltage differential signal from analog signaling and provides a digital output signal at a receiver output to a CAN controller based on the voltage differential signal. The analog signaling received from the CAN bus can operate with a first voltage level scheme of a first CAN protocol and a second voltage level scheme for a second CAN protocol. A first comparator compares the voltage differential signal to a first threshold which is set to a value which differentiates between a logic low bit and logic high bit in accordance with the second CAN protocol. Filtering circuitry selectively filters an output of the first comparator based on detection of noise on the CAN bus to provide a first digital signal indicative of activity on the CAN bus according to the second CAN protocol.