Methods and apparatus are described for adding one or more features (e.g., high bandwidth memory (HBM)) to a qualified stacked silicon interconnect (SSI) technology programmable integrated circuit (IC) region by providing an interface (e.g., an HBM buffer region implemented with a hierarchical switch network) between the added feature device and the programmable IC region. One example apparatus generally includes a programmable IC region and an interface region configured to couple the programmable IC region to at least one fixed feature die via a first plurality of ports associated with the at least one fixed feature die and a second plurality of ports associated with the programmable IC region. The interface region is configured as a switch network between the first plurality of ports and the second plurality of ports, and the switch network includes a plurality of full crossbar switch networks.

Apparatuses, methods, and systems directed to a circuit board assembly configured for parallel plugged card removal are disclosed. A circuit board assembly includes a main circuit board configured to dock an expansion card in a parallel arrangement, at least two circuit board connectors disposed on a surface of the main circuit board and operable to receive respective plug connectors of the expansion card, and a pivoting assembly comprising a plurality of lever arms, the pivoting assembly being coupled to main circuit board such that a first circuit board connector is disposed between a first pair of lever arms and a second circuit board connector is disposed between a second pair of lever arms, wherein a force applied to the pivoting assembly in direction approaching the main circuit board is translated to a force applied by each lever arm in direction away from the main circuit board.

The present disclosure relates to an electronic device. A test board having improved reliability according to the present disclosure includes a main board, a storage device connector positioned at an upper section of the main board and configured to vertically combine the main board and a storage device with each other, an analysis signal output terminal positioned at the upper section of the main board and configured to output an analysis signal for testing the storage device or communication between the storage device and a host, a host connector connected to a first side section of the main board and configured to combine the main board and the host with each other; and a first sub board detachably connected to a second side section of the main board.

A memory module may include: a plurality of stacked memory chips; a memory controller; and an interposer connected between the plurality of memory chips and the memory controller.

A modular IoT sensor system for Internet of things includes a network module and an expanded sensor module. The expanded sensor module includes a male connector and a female connector respectively disposed in two connection surfaces of the expanded sensor module, configured to detachably connect to a female connector of the network module. Shape and size of the female connector of the network module and the male connector and the female connector of the expanded sensor module conform to a USB type-C specification and pin definitions thereof are complied with a first pin definition different from USB type-C specification.

A method and a memory device therefor for reconfiguring a DQ pad organization of the memory device on-the-fly. A DQ organization reconfiguration control unit generates a control signal for reconfiguring the DQ pad organization into a desired mode based on a user command. A DQ organization reconfiguration unit is provided between P DQ pads and memory cell arrays and reconfigures organization P DQ pads on-the-fly in any one among Xi DQ pad modes, where i=1, 2, 4, 8, 16, 32, 64, and 128, based on the control signal. For the reconfiguration of the organization of the DQ pads, a plurality of bus lines for data transfer, being switchable by a control signal, are provided. The bus lines are implemented utilizing at least one of the M3 and M4 metal layers of the memory device.

An apparatus having a first interface of a first type supporting a plurality of data ports, a second interface of a second type supporting at least a portion of the plurality data ports, and a third interface of the second type. The apparatus also including a switching module coupled to a control port of the first interface and configured for selectably coupling the plurality of data ports to at least one of the second interface and the third interface based on a signal at the control port.

A stacking modular instrument bus device includes N instrument sub-modules, N+1 customized bus connectors, a first bus termination module and a second bus termination module. The N instrument sub-modules are connected with each other in series through the N1 customized bus connectors to form an instrument sub-system, two ends of the N instrument sub-modules are respectively connected with the first bus termination module and the second bus termination module through one customized bus connector; each of the instrument sub-modules includes a bus unit and a functional unit. The present invention can freely stack and combine all the instrument sub-modules in the manner of building blocks, which is divorced from the conventional backboard type structure and becomes more flexible. Every instrument sub-module has the independent and complete instrument structure and form the system itself. The bus unit of the instrument sub-module is detached from the functional unit thereof.

The presented invention provides a data storage device. The memory device comprises an interface card and an expansion board. The interface card comprises a controller, a transmission interface, a plurality of first data storage elements and a first connector. The expansion board comprises a plurality of second data storage elements and a second connector. The expansion board is connected to the first connector of the interface card by the second connector to be stacked on the interface card. The controller is able to access data of the first data storage elements and the second data storage elements. Thus, the data storage capacity of the data storage device can be expanded by the expansion board, having the data storage elements, configured on the interface card.

Methods and apparatus are described for adding one or more features (e.g., high bandwidth memory (HBM)) to a qualified stacked silicon interconnect (SSI) technology programmable integrated circuit (IC) region by providing an interface (e.g., an HBM buffer region implemented with a hierarchical switch network) between the added feature device and the programmable IC region. One example apparatus generally includes a programmable IC region and an interface region configured to couple the programmable IC region to at least one fixed feature die via a first plurality of ports associated with the at least one fixed feature die and a second plurality of ports associated with the programmable IC region. The interface region is configured as a switch network between the first plurality of ports and the second plurality of ports, and the switch network includes a plurality of full crossbar switch networks.