Apparatus, systems, methods for measuring a side-channel is disclosed. The methods involve obtaining a first measurement of a magnetic field in a first range from the side-channel of the at least one electronic device; generating a version of the side-channel; obtaining a second measurement of the magnetic field in a second range from the version of the side-channel; and generating a composite measurement of the magnetic field from the side-channel of the at least one electronic device based on the first measurement and the second measurement. The first range includes a minimum threshold and at least a portion of the second range is less than the minimum threshold of the first range.

In one embodiment, a processor includes a memory hierarchy and a core coupled to the memory hierarchy. The memory hierarchy stores encrypted data, and the core includes circuitry to access the encrypted data stored in the memory hierarchy, decrypt the encrypted data to yield decrypted data, perform an entropy test on the decrypted data, and update a processor state based on a result of the entropy test. The entropy test may include determining a number of data entities in the decrypted data whose values are equal to one another, determining a number of adjacent data entities in the decrypted data whose values are equal to one another, determining a number of data entities in the decrypted data whose values are equal to at least one special value from a set of special values, or determining a sum of n highest data entity value frequencies.

In an example, a method includes providing a computing device with an instruction to cause the computing device to execute the instruction. The method further includes monitoring a side channel of a microarchitectural component of the computing device to obtain an indication of whether or not a state of the microarchitectural component changes as a result of the computing device executing the instruction. The method further includes determining whether or not the indication corresponds to an expected state of the microarchitectural component for the instruction.

A method for managing memory within a computing system. The method includes one or more computer processors identifying a range of physical memory addresses that store a first data. The method further includes determining whether a second data is stored within the range of physical memory addresses that stores the first data. The method further includes responding to determining that the second data is stored within the range of physical memory addresses that store the first data, by determining whether a process accessing the second data is identified as associated with a side-channel attack. The method further includes responding to determining that the process accessing the second data is associated with the side-channel attack, by initiating a response associated with the process accessing the second data.

Plural Internet of Things (IoT) gateways detect, secure against and remediate malicious code with an autonomous communication of tokens between the IoT gateways on a time schedule. Detection of an invalid token or a token communication outside of a scheduled time indicates that malicious code may have interfered with token generation or communication. Once malicious code is verified on an IoT gateway, the failed gateway is remediated to an operational state, such as with a re-imaging by another IoT gateway through an in band communication or a re-imaging by a server information handling system through an out of band communication.

A method for device authentication comprises receiving, by processing hardware of a first device, a message from a second device to authenticate the first device. The processing hardware retrieves a secret value from secure storage hardware operatively coupled to the processing hardware. The processing hardware derives a validator from the secret value using a path through a key tree, wherein the path is based on the message, wherein deriving the validator using the path through the key tree comprises computing a plurality of successive intermediate keys starting with a value based on the secret value and leading to the validator, wherein each successive intermediate key is derived based on at least a portion of the message and a prior key. The first device then sends the validator to the second device.

Embodiments relate to systems, devices, and computer-implemented methods for preventing determination of previous access of sensitive content by receiving, from a user, a request for content at a device in an information centric network, where a cached version of the content is locally stored at the device; initiating a time delay based on a determination that the user has not previously requested the content; and transmitting the cached version of the content to the user after the time delay.

Provided is an on-chip monitor circuit mounted on a semiconductor chip that is equipped with a security function module for performing a security function process on an input signal and outputting a security function signal, the on-chip monitor circuit comprising a monitor circuit for monitoring signal waveforms of the semiconductor chip, wherein the circuit is provided with a first storage means for storing data that designates a window period in which to perform a test of the semiconductor chip, and a control means for performing control to operate the circuit during the window period, when a prescribed test signal is inputted to the security function module. By using the on-chip monitor circuit in a semiconductor chip of which security is required, security attacks, e.g., a Trojan horse or the like, intended to embed a malicious circuit in the production stage of security function module-equipped semiconductors chips, can be prevented.

A random number generator resistant to side-channel attacks. The random number generator includes an entropy unit generating random pulses, a random frequency clock generator generating random frequencies by receiving random pulses output from the entropy unit, and an MCU externally masking a specific operation or a specific instruction based on a random frequency received from the random frequency clock generator.

A system and method detect a row hammer attack on the memory media device and generates a hardware interrupt based on the detection of the row hammer attack. This row hammer interrupt is communicated to an operating system of a host computing device, which in turn performs an interrupt service routine including generating a command to perform a row hammer mitigation operation. This command is provided to the memory controller which performs the row hammer mitigation operation in response to the command such as activating victim row(s) of the memory media device or throttling data traffic to the memory media device.