Patent classifications
G06F2212/154
STORAGE SYSTEM AND METHOD FOR ACCESSING SAME
A data access system including a processor and a storage system including a main memory and a cache module. The cache module includes a FLC controller and a cache. The cache is configured as a FLC to be accessed prior to accessing the main memory. The processor is coupled to levels of cache separate from the FLC. The processor generates, in response to data required by the processor not being in the levels of cache, a physical address corresponding to a physical location in the storage system. The FLC controller generates a virtual address based on the physical address. The virtual address corresponds to a physical location within the FLC or the main memory. The cache module causes, in response to the virtual address not corresponding to the physical location within the FLC, the data required by the processor to be retrieved from the main memory.
METHOD AND APPARATUS TO REDUCE CACHE STAMPEDING
An apparatus comprises a memory having a data cache stored therein and a control circuit operably coupled thereto. The control circuit is configured to update that data cache in accordance with a scheduled update time. In the latter regards, by one approach, the control circuit computes selected entries for the data cache prior to the scheduled update time pursuant to a prioritization scheme to provide a substitute data cache. At the scheduled update time, the control circuit switches the substitute data cache for the data cache such that data queries made subsequent to the scheduled update time access the substitute data cache and not the data cache.
Architecture utilizing a middle map between logical to physical address mapping to support metadata updates for dynamic block relocation
A method for block addressing is provided. The method includes moving content of a data block referenced by a logical block address (LBA) from a first physical block corresponding to a first physical block address (PBA) to a second physical block corresponding to a second PBA, wherein prior to the moving a logical map maps the LBA to a middle block address (MBA) and a middle map maps the MBA to the first PBA and in response to the moving, updating the middle map to map the MBA to the second PBA instead of the first PBA.
Smooth image scrolling with disk I/O activity optimization and enhancement to memory consumption
A system and method for performing image scrolling are disclosed. In one embodiment, a system for image scrolling organizes each set of related images as a series object. The system writes selected images from one of the series objects, from the image cache to the frame buffer, for image scrolling on a display. A garbage collection module performs garbage collection in the image cache. The garbage collection module operates on memory space where a series object is released or can be moved, for reclaiming memory. The image scrolling is smoother than if the garbage collection module were to track and operate on each image as an object.
Maintaining a cached version of a file at a router device
A router device may receive, from a user device, a request for access to a file. The router device may determine that a cached version of the file is stored in a first data structure associated with the router device. The router device may communicate with a server device to determine whether the cached version of the file is current. The server device may be associated with a second data structure that stores a master version of the file. The router device may generate a copy of the cached version of the file based on communicating with the server device. The router device may send the copy of the cached version of the file to the user device.
Dynamic updating of query result displays
Described are methods, systems and computer readable media for dynamic updating of query result displays.
Memory management based on read-miss events
Aspects of the present disclosure relate to asynchronous memory management. In embodiments, an input/output (IO) workload is received at a storage array. Further, one or more read-miss events corresponding to the IO workload are identified. Additionally, at least one of the storage array's cache slots is bound to a track identifier (TID) corresponding to the read-miss events based on one or more of the read-miss events' two-dimensional metrics.
SYSTEM PERFORMANCE LOGGING OF COMPLEX REMOTE QUERY PROCESSOR QUERY OPERATIONS
Described are methods, systems and computer readable media for performance logging of complex query operations.
Extracting Malicious Instructions on a Virtual Machine in a Network Environment
A system including a guest virtual machine with one or more virtual machine measurement points configured to collect virtual machine operating characteristics metadata and a hypervisor control point configured to receive virtual machine operating characteristics metadata from the virtual machine measurement points. The hypervisor control point is further configured to send the virtual machine operating characteristics metadata to a hypervisor associated with the guest virtual machine. The system further includes the hypervisor configured to receive the virtual machine operating characteristics metadata and to forward the virtual machine operating characteristics metadata to a hypervisor device driver in a virtual vault machine. The system further includes the virtual vault machine configured to determine a classification for the guest virtual machine based on the virtual machine operating characteristics metadata and to send the determined classification to a vault management console.
COMPUTER DATA SYSTEM DATA SOURCE REFRESHING USING AN UPDATE PROPAGATION GRAPH
Described are methods, systems and computer readable media for data source refreshing.