An apparatus is disclosed for bidirectional amplification with phase-shifting. In example implementations, an apparatus includes a phase shifter with a bidirectional amplifier. The bidirectional amplifier includes a first transistor coupled between a first plus node and a second minus node, a second transistor coupled between a first minus node and a second plus node, a third transistor coupled between the first plus node and the second minus node, and a fourth transistor coupled between the first minus node and the second plus node. The bidirectional amplifier also includes a fifth transistor coupled between the first plus node and the second plus node, a sixth transistor coupled between the first minus node and the second minus node, a seventh transistor coupled between the first plus node and the second plus node, and an eighth transistor coupled between the first minus node and the second minus node.

A display panel is provided. The display panel includes a pixel array, multiple data lines and first scan lines. The pixel array is arranged in multiple pixel rows by multiple pixel columns, and includes a first pixel row, a second pixel row, and a third pixel row which are adjacent pixel rows. The first scan line is coupled to multiple first pixel groups. Each first pixel group includes multiple first pixels in the first pixel row and multiple second pixels in the second pixel row adjacent to the first pixel row. A display driving circuit for driving a display panel is also provided.

A display device includes a display unit including gate lines and pixels electrically coupled to the gate lines; a timing controller configured to generate an on-clock signal, an off-clock signal, an enable signal, and a common signal; a clock generator configured to generate a plurality of clock signals having different phases based on the on-clock signal and the off-clock signal, when the enable signal has a first voltage level, wherein the clock generator is to insert a common pulse into each of the plurality of clock signals based on the common signal, when the enable signal has a second voltage level different from the first voltage level; and a gate driver configured to generate gate signals based on the plurality of clock signals, and to sequentially provide the gate signals to the gate lines.

The invention relates to a source driver and a composite level shifter. The source driver comprises a data buffer circuit, a plurality of level shifters and a plurality of driving circuits. The data buffer circuit receives and registers a plurality of pixel data during a driving period. The level shifters convert the voltage levels of the pixel data registered in the data buffer circuit during the driving period. The driving circuits generate a plurality of source signals according to the converted pixel data during driving period. The data buffer circuit may comprise a plurality of composite level shifters for converting the voltage levels of the pixel data, and latching the converted pixel data.

An electrophoretic medium comprises a fluid and first (B), second (Y), third (R) and fourth (W) particles dispersed in the fluid and having differing colors. The first (B) and third (R) particles bear charges of one polarity and the second (Y) and fourth (W) particles bear charges of the opposite polarity, The first particles (B) have a greater zeta potential than the third particles (R), and the second particles (Y) have a greater zeta potential than the fourth particles (W). One of the particles (W) is white, one of the non-white particles (B) is partially light-transmissive, and the remaining two non-white particles are light-reflective. To display the color of a mixture of the first (B) and second (Y) particles at a viewing surface, the medium is driven to display the second particles (Y) at the viewing surface, then a first driving voltage is applied for a first period to drive the second (Y) and fourth (W) particles towards the viewing surface, then a second driving voltage, of opposite polarity to and lower magnitude than, the first voltage, is applied for a second period less than the first period, and finally the applications of the two driving voltages are repeated.

A control method of an e-ink screen. The e-ink screen includes a plurality of pixels, at least one pixel includes first color charged particles and second color charged particles, and the first color charged particles and the second color charged particles are same in electrical property. The control method of the e-ink screen includes: inputting a first color driving signal to pixels expected to display a first color in the e-ink screen. The first color driving signal includes a plurality of sub-signals corresponding to a plurality of driving stages. The plurality of sub-signals include a first color imaging sub-signal and a particle separation sub-signal. The particle separation sub-signal is configured to drive the first color charged particles and the second color charged particles in the at least one pixel to move, and to separate the first color charged particles from the second color charged particles.

Disclosed are a low power driving system and timing controller for a display device. The low power driving system for a display device may include a timing controller configured to transmit a packet to which one of first option information corresponding to a static pattern or second option information corresponding to a dynamic pattern is applied, and a source driver configured to receive the packet and to perform a low power mode corresponding to the static pattern based on the first option information or adaptive charge sharing corresponding to the dynamic pattern based on the second option information.

A display device includes a polycrystalline semiconductor including a channel and electrodes of a driving transistor; a gate electrode of the driving transistor on the channel of the driving transistor; a first storage electrode on the gate electrode of the driving transistor; a light blocking layer of a first transistor and a light blocking layer of a second transistor; an oxide semiconductor including a channel and electrodes of the first transistor, and a channel and electrodes of the second transistor; a gate electrode of the first transistor on the channel of the first transistor; and a gate electrode of the second transistor on the channel of the second transistor. The light blocking layer of the first transistor and the first storage electrode are on a same layer, and the light blocking layer of the second transistor and the gate electrode of the driving transistor are on a same layer.

The application provides a display panel and a driving method thereof. The display panel comprises a plurality of sub-pixels arranged in a matrix, and the sub-pixels are grouped into a plurality of cell areas arranged repeatedly along the row direction and the column direction. Each cell area comprises at least two sub-pixels, with polarities of adjacent sub-pixels opposite to each other. For at least two consecutive frames during a display cycle, the gray-levels of sub-pixels in the cell area maintain unchanged while polarities of the sub-pixels are reversed.

A display device includes: a first pixel transistor couples one electrode of holding capacitance to a first signal line; a second pixel transistor couples another electrode of the holding capacitance to a second signal line; a third pixel transistor couples the other electrode of the holding capacitance to a GND potential; and a driver that supplies a negative potential to the second signal line when the first signal line is supplied with a positive potential, supplies the GND potential to the second signal line when the first signal line is supplied with the GND potential, and supplies the positive potential to the second signal line when the first signal line is supplied with the negative potential. The first and second pixel transistors are on during a writing period and off during a holding period. The third pixel transistor is off during the writing period and on during the holding period.