A display apparatus includes a display panel including: a pixel array in which pixels including a plurality of light-emitting elements are arranged in a plurality of row lines and sub-pixel circuits provided for each of the plurality of light-emitting elements and providing a driving current to the light-emitting elements. The display apparatus also includes a drive unit is configured to: set image data voltages to the sub-pixel circuits of the display panel in a row line order during a data setting period for each row line; and drive the sub-pixel circuits to provide the driving current to the light-emitting elements of the pixel array in the row line order based on a sweep signal sweeping from a first voltage to a second voltage and the set image data voltages during a light-emitting period for each row line.

Provided are a display panel and a display device. The display panel includes multiple cascaded gate drive units. Each gate drive unit includes a shift register unit and an inverted unit. The inverted unit is electrically connected to the shift register unit. A scan output terminal of the shift register unit is electrically connected to one scan line. An inverted scan output terminal of the inverted unit is electrically connected to one inverted scan line. The scan output terminal of the shift register unit outputs a first effective pulse signal. The inverted scan output terminal of the inverted unit outputs a second effective pulse signal. A time period corresponding to the first effective pulse signal at least partially overlaps a time period corresponding to the second effective pulse signal, and the type of the first effective pulse signal is opposite to the type of the second effective pulse signal.

A driving circuit and a display panel are disclosed. The driving circuit includes a plurality of cascaded driving units. The driving unit includes a forward/backward scan control module, a first control node controlling module, a second control node controlling module, a global control module, a regulating module, a first output module configured to output a stage signal, and a second output module configured to output a gate driving signal. A voltage level of the gate driving signal is higher than a voltage level of the stage signal.

Narrowing of a picture-frame of a display device that can perform switching between vertical scanning directions is implemented. A gate driver (21) includes a shift register (211) including a plurality of unit circuits including n unit circuits connected to write control lines; a first scanning order switching circuit (212) including a plurality of first switching circuits respectively corresponding to the plurality of unit circuits; and a second scanning order switching circuit (213) including n second switching circuits connected to initialization control lines. The first scanning order switching circuit (212) controls operation of the shift register (211) based on scanning order instruction signals. Each second switching circuit applies, based on the scanning order instruction signals, an output signal from a unit circuit on a previous stage side or an output signal from a unit circuit on a subsequent stage side, as a second scanning signal, to an initialization control line.

A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.

The present disclosure provides a shift register, a gate driving circuit, a display panel, and a driving method thereof. The shift register includes: an input circuit; an output circuit; a first control circuit configured to provide a potential of a first control signal terminal to a pull-down node, and provide a potential of a reference signal terminal to the pull-down node according to the potential of the pull-up node; and a second control circuit connected to the pull-down node, a second control signal terminal, the output signal terminal, and the reference signal terminal, wherein the second control circuit is configured to pull down a potential of the output signal terminal during a display phase under the control of a potential of the pull-down node and a potential of the second control signal terminal, and pull up the potential of the output signal terminal in a power-off phase.

A scanning drive circuit, a driving method, a display panel, and a display apparatus are provided. The scanning drive circuit includes 1.sup.st to n.sup.th shift registers cascaded sequentially. Each shift register includes a pull-down unit, a pull-up unit, and first and second output units. The first output unit is electrically connected to a second supply voltage terminal and a first clock signal output terminal, and configured to output a level to a first output terminal based on levels of a second node and a third node. The second output unit is electrically connected to a third supply voltage terminal and a second clock signal output terminal, and configured to output a level to a second output terminal based on the levels of the second node and a fourth node. The first and the second output terminals of each shift register output effective levels sequentially.

Provided are a display panel, a detection method thereof and a display device. A scan driving circuit, signal pins and a first gating circuit are disposed in the display panel. Signal pins include a detection signal pin and an enable signal pin. The scan driving circuit includes scan drive units disposed in a cascade manner. The first gating circuit includes a first switch unit and a second switch unit. An input terminal of the first switch unit is electrically connected to a scan signal detection terminal of an Nth-stage scan drive unit. An input terminal of the second switch unit is electrically connected to a scan signal detection terminal of a first-stage scan drive unit. An output terminal of the first switch unit and an output terminal of the second switch unit are both electrically connected to the detection signal pin. The first switch unit is configured to turn on in a forward scan detection stage and turn off in a backward scan detection stage. The second switch unit is configured to turn on in the backward scan detection stage and turn off in the backward scan detection stage.

The present disclosure provides a method for sending driving data of a backlight source, a control circuit and a display device. The method includes: acquiring driving data of a plurality of rows of light-emitting elements included in the backlight source; and sending the driving data of the plurality of rows of light-emitting elements to a driving circuit of the backlight source at many times, wherein at least one data packet is sent each time, each data packet includes driving data for driving one row of light-emitting elements and a quantity of data packets sent each time is less than a quantity of rows of light-emitting elements included in the backlight source.

The invention provides a GOA circuit and driving method therefor, and a display panel. The GOA circuit includes a GOA unit. The GOA unit includes a forward and reverse scan control module, a node signal control module, a voltage regulator module, an output control module, a first pull-down module, and a second pull-down module. When the second pull-down module is in operation, the forward and reverse scan control module controls the voltage regulator module to be in an off state, so that the GOA circuit has no transistor in the on state for a long time, thus to suppress threshold voltage drift in transistors.