A display device and a driving method thereof are discussed. The display device can include a display panel for displaying images, a scan driver for supplying scan signals to the display panel, and a gate compensation circuit. The gate compensation circuit is configured to respectively sense a first node voltage and a second node voltage from a first node controller and a second node controller of the scan driver, and change a turn-on duty ratio of the first node controller to the second node controller based on the sensed first node voltage and second node voltage.

A shift register and a driving method thereof, a gate drive circuit, and a display device are provided. The shift register includes: an input circuit, configured to input an input voltage provided by the input voltage terminal to an intermediate circuit under control of a first clock signal provided by the first clock signal terminal; the intermediate circuit, configured to write a second clock signal output by the second clock signal terminal or a first power signal output by the first power terminal to the intermediate output terminal as an intermediate output signal under control of the input voltage and the control circuit; and an output circuit, configured to output an output signal, a phase of which is opposite to a phase of the intermediate output signal.

A system reads a desired circuit parameter from a pixel circuit that includes a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. One embodiment of the extraction system turns off the drive device and supplies a predetermined voltage from an external source to the light emitting device, discharges the light emitting device until the light emitting device turns off, and then reads the voltage on the light emitting device while that device is turned off. The voltages on the light emitting devices in a plurality of pixel circuits may be read via the same external line, at different times.

The embodiments of the application disclose a control device for a gate driving circuit, a display panel and a display device. The control device for a gate driving circuit provided in the embodiment comprises a level shifter and a control module electrically connected with an output of the level shifter. The control module is used for controlling an output signal of the level shifter to be a low level signal when each input clock signal for the level shifter is low.

A liquid crystal display driving method provided includes the following steps: acquiring a current gray level value of a current frame image; determining a gray level of the current gray level value; if the current gray level value is the high gray level, then determining whether to perform an overvoltage driving according to a first gray level difference threshold value; if the current gray level value is the low gray level, then determining whether to perform the overvoltage driving according to a second gray level difference threshold value. The present invention can precisely determine whether to perform the overvoltage driving on the pixel electrode.

A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.

A display module including a substrate having a plurality of pixels, a data line that supplies a data signal to a pixel, a current supply line that supplies electric current to the pixel, a data driving circuit that supplies a data signal to the data line, and a gate driving circuit thereon. The plurality of pixels are arranged in a display area of the substrate, and each of the plurality of pixels includes a light emitting device, a first thin film transistor connected to the data line that supplies the data signal, a second thin film transistor connected to the current supply line, and a capacitor. The light emitting device includes a first electrode layer connected to the second thin film transistor, an organic layer formed on the first electrode layer, and a second electrode layer formed on the organic layer.

A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.

An electro-optical device includes one or more control lines that include a scanning line, a data line and a pixel circuit. The pixel circuit has a drive transistor, a write-in transistor with a gate which is electrically connected to the scanning line, a light-emitting element that emits light at a brightness that depends on the size of a current that is supplied through the drive transistor, and a control line which overlaps the gate of the drive transistor when viewed from a direction that is perpendicular to a surface of a substrate on which the pixel circuit is formed is included in the one or more control lines.

A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of onion of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10.sup.−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.