A pixel circuit and a display device including the same are disclosed. The pixel circuit includes a driving element including a first electrode connected to a first node to which a pixel driving voltage is applied, a gate electrode connected to a second node, and a third electrode connected to a third node; a light emitting element including an anode electrode connected to the third node, and a cathode electrode to which a pixel ground voltage supply voltage is applied; a first switch element configured to supply a data voltage to the second node in response to a scan pulse; and a second switch element configured to supply a first initialization voltage set to a negative voltage that is less than the pixel ground voltage supply voltage to the third node in response to a first initialization pulse.

A pixel circuit and a display device including the same are disclosed. The pixel circuit includes a driving element including a first electrode connected to a first node to which a pixel driving voltage is applied, a gate electrode connected to a second node, and a third electrode connected to a third node; a light emitting element including an anode electrode connected to the third node, and a cathode electrode to which a pixel ground voltage supply voltage is applied; a first switch element configured to supply a data voltage to the second node in response to a scan pulse; and a second switch element configured to supply a first initialization voltage set to a negative voltage that is less than the pixel ground voltage supply voltage to the third node in response to a first initialization pulse.

The present disclosure relates to an image display apparatus. The image display apparatus includes: a display including an organic light emitting diode panel (OLED panel); and a controller configured to control the display, wherein the controller calculates an Average Picture Level (APL) of an input image, and in response to the calculated APL being greater than or equal to a first reference value in a high-dynamic range (HDR) mode, the controller decreases the APL and perform luminance conversion based on the decreased APL, and in response to the calculated APL being greater than or equal to the first reference value in a normal mode rather than the HDR mode, the controller performs luminance conversion based on the calculated APL. Accordingly, luminance representation may be improved during displaying image.

Methods and systems to provide baseline measurements for aging compensation for a display device are disclosed. An example display system has a plurality of active pixels and a reference pixel. Common input signals are provided to the reference pixel and the plurality of active pixels. The outputs of the reference pixel is measured and compared to the output of the active pixels to determine aging effects. The display system may also be tested applying a first known reference current to a current comparator with a second variable reference current and the output of a device under test such as one of the pixels. The variable reference current is adjusted until the second current and the output of the device under test is equivalent of the first current. The resulting current of the device under test is stored in a look up table for a baseline for aging measurements during the display system operation. The display system may also be tested to determine production flaws by determining anomalies such as short circuits in pixel components such as OLEDs and drive transistors.

Methods and systems to provide baseline measurements for aging compensation for a display device are disclosed. An example display system has a plurality of active pixels and a reference pixel. Common input signals are provided to the reference pixel and the plurality of active pixels. The outputs of the reference pixel is measured and compared to the output of the active pixels to determine aging effects. The display system may also be tested applying a first known reference current to a current comparator with a second variable reference current and the output of a device under test such as one of the pixels. The variable reference current is adjusted until the second current and the output of the device under test is equivalent of the first current. The resulting current of the device under test is stored in a look up table for a baseline for aging measurements during the display system operation. The display system may also be tested to determine production flaws by determining anomalies such as short circuits in pixel components such as OLEDs and drive transistors.

A display device may include a plurality of pixels each including a light emitting element. A first scan line and a second scan line, are disposed in each of the pixels. A data line is disposed in each of the pixels. A power line is disposed in each of the pixels. A reference voltage line is disposed in each of the pixels. A first transistor controls a current of the light emitting element. A second transistor is connected between the data line and a first gate electrode of the first transistor. A third transistor is connected between the reference voltage line and a first electrode of the first transistor. A fourth transistor is connected between the power line and a second electrode of the first transistor. The fourth transistor may be a transistor of a type different from that of the first to third transistors.

A display device may include a plurality of pixels each including a light emitting element. A first scan line and a second scan line, are disposed in each of the pixels. A data line is disposed in each of the pixels. A power line is disposed in each of the pixels. A reference voltage line is disposed in each of the pixels. A first transistor controls a current of the light emitting element. A second transistor is connected between the data line and a first gate electrode of the first transistor. A third transistor is connected between the reference voltage line and a first electrode of the first transistor. A fourth transistor is connected between the power line and a second electrode of the first transistor. The fourth transistor may be a transistor of a type different from that of the first to third transistors.

Disclosed is an electroluminescent display device using a variable refresh rate (VRR) mode. The purpose of the present disclosure is to reduce the occurrence of a difference in luminance at a time point of a refresh rate change, thereby preventing viewers from perceiving the variation of the refresh rate.

Provided are a driving method for a display panel, display driving device and electronic apparatus. The display panel includes a shift register. A drive signal of the shift register includes a trigger signal and a clock signal. The driving method includes: a current FPS in a current display mode is acquired; a current trigger signal and a current clock signal of the shift register is determined according to the current FPS; the shift register is provided with the current trigger signal and the current clock signal. A refresh frequency of the current trigger signal is the same as the current FPS. The current clock signal is the same as a reference clock signal in a reference display mode at least within an effective action duration of the current trigger signal. The current FPS is less than or equal to the reference FPS in the reference display mode.

Provided are a driving method for a display panel, display driving device and electronic apparatus. The display panel includes a shift register. A drive signal of the shift register includes a trigger signal and a clock signal. The driving method includes: a current FPS in a current display mode is acquired; a current trigger signal and a current clock signal of the shift register is determined according to the current FPS; the shift register is provided with the current trigger signal and the current clock signal. A refresh frequency of the current trigger signal is the same as the current FPS. The current clock signal is the same as a reference clock signal in a reference display mode at least within an effective action duration of the current trigger signal. The current FPS is less than or equal to the reference FPS in the reference display mode.