The technology disclosed herein pertains to a system and method for managing off-track retry. An implementation of a method of determining offset direction for read off-track retry includes storing analog to digital converter (ADC) values of data read from a data sector by a data reader in a read channel buffer, calculating an indicator value of the distribution of the ADC values, determining an amount of offset for the data reader based on the indicator value, and moving the data reader by the amount of offset before performing a read retry operation.

An embodiment of a data-read path includes a defect detector and a data-recovery circuit. The defect detector is operable to identify a defective region of a data-storage medium, and the data-recovery circuit is operable to recover data from the data-storage medium in response to the defect detector. For example, such an embodiment may allow identifying a defective region of a data-storage disk caused, e.g., by a scratch or contamination, and may allow recovering data that was written to the defective region.

The technology disclosed herein pertains to a system and method for managing off-track retry. An implementation of a method of determining offset direction for read off-track retry includes storing analog to digital converter (ADC) values of data read from a data sector by a data reader in a read channel buffer, calculating an indicator value of the distribution of the ADC values, determining an amount of offset for the data reader based on the indicator value, and moving the data reader by the amount of offset before performing a read retry operation.

Analog-to-digital conversion circuitry for generating a digital output signal is disclosed comprising a sample-and-hold circuit comprising an adjustable sample capacitor for coupling to an analog input signal during a sample phase, and an analog-to-digital converter (ADC) coupled to an output of the sample-and-hold circuit during a hold phase. In order to compensate in real-time for an increase in an amplitude of the input signal, a capacitance of the sample capacitor is decreased by an attenuation factor, and an output of the ADC is multiplied by an inverse of the attenuation factor to generate the digital output signal.

A system for compensating for heat induced transient phase shift in a heat assisted magnetic recording system. A heat assisted magnetic data recording system includes a near field thermal transducer that locally heats the media during writing. The thermal transducer, when activated, results in a change in size of a magnetic transition written to the magnetic media. This change in size of the thermal transition results in a transient phase shift of the data recorded on the magnetic media. The system includes circuitry for predetermining an anticipated amount of transient phase shift and adjusting a subsequent read signal to compensate for the known transient phase shift, thereby eliminating signal errors resulting from the transient phase shift.

A data storage device is disclosed comprising a disk, a head for accessing the disk, and a sensor for generating an alternating sensor signal. The sensor is disconnected from an input of a sensing circuit and while the sensor is disconnected an alternating calibration signal is injected into the input of the sensing circuit, wherein the alternating calibration signal comprises a predetermined offset and amplitude. A response of the sensing circuit to the alternating calibration signal is evaluated to detect at least one of an offset and a gain of the sensing circuit.

This application includes systems and techniques relating to storage devices, such as a device including: a first read channel to process a first input signal obtained from a storage medium using a first read head; a second read channel to process a second input signal obtained from the storage medium using a second read head, which is offset from the first read head in each of two dimensions; a single digital timing loop configured to control interpolation of timing of sampling for first and second analog to digital converters in the first and second read channels; and a two dimensional equalizer coupled with output lines of the first and second read channels; the device being configured to account for a fractional timing difference between the first input signal and the second input signal, the fractional timing difference being a fractional amount of a single clock cycle of the device.

Disclosed are a two-stage audio gain circuit based on analog-to-digital conversion and an audio terminal. The two-stage audio gain circuit includes a PGA configured to receive an analog audio signal and perform programmable gain amplification processing on the received analog audio signal; an ADC configured to convert the analog audio signal after the programmable gain amplification processing into a digital audio signal and output the digital audio signal; a first AGC gain unit configured to perform a first AGC processing on the digital audio signal and output a first gain adjustment value to the PGA, for the PGA to perform gain adjustment on the received analog audio signal; and a second AGC gain unit configured to perform a second AGC processing on the digital audio signal and output a second gain adjustment value to the PGA, for the PGA to perform gain adjustment on the received analog audio signal.

A data storage device can consist of a data storage medium that has a recording surface accessed by a first transducing head suspended by a first actuator and a second transducing head suspended by a second actuator. The first actuator may be configured to access a first region of the recording surface while the second actuator is configured to access a second region of the recording surface. The first and second regions can be separate and non-overlapping.

Technology for improved data detection using machine learning may include a method in which an analog read signal comprising data read from a non-transitory storage medium of the data storage device is received. The analog read signal is processed into a plurality of digital samples. A digital sample from the plurality of digital samples is classified into a category from a plurality of categories using a machine learning algorithm for at least some of the plurality of digital samples. The plurality of digital samples is then decoded based on at least some of the predicted categories.