G11B20/10425

On head microelectronics for write synchronization

The presently disclosed technology teaches integrating disc drive electronics into a transducer head. Decreased electrical transit times and data processing times can be achieved by placing the electronics on or within the transducer head because electrical connections may be made physically shorter than in conventional systems. The electronics may include one or more of a control system circuit, a write driver, and/or a data buffer. The control system circuit generates a modified clock signal that has a fixed relation to phase and frequency of a bit-detected reference signal that corresponds to positions of patterned bits on the disc. The write driver writes outgoing data bits received from an external connection to off-head electronics directly to the writer synchronized with the modified clock signal. The data buffer stores and converts digital data bits sent from the off-head electronics to an analog signal that is synchronized with the modified clock signal.

ON HEAD MICROELECTRONICS FOR WRITE SYNCHRONIZATION

The presently disclosed technology teaches integrating disc drive electronics into a transducer head. Decreased electrical transit times and data processing times can be achieved by placing the electronics on or within the transducer head because electrical connections may be made physically shorter than in conventional systems. The electronics may include one or more of a control system circuit, a write driver, and/or a data buffer. The control system circuit generates a modified clock signal that has a fixed relation to phase and frequency of a bit-detected reference signal that corresponds to positions of patterned bits on the disc. The write driver writes outgoing data bits received from an external connection to off-head electronics directly to the writer synchronized with the modified clock signal. The data buffer stores and converts digital data bits sent from the off-head electronics to an analog signal that is synchronized with the modified clock signal.

On head microelectronics for write synchronization

The presently disclosed technology teaches integrating disc drive electronics into a transducer head. Decreased electrical transit times and data processing times can be achieved by placing the electronics on or within the transducer head because electrical connections may be made physically shorter than in conventional systems. The electronics may include one or more of a control system circuit, a write driver, and/or a data buffer. The control system circuit generates a modified clock signal that has a fixed relation to phase and frequency of a bit-detected reference signal that corresponds to positions of patterned bits on the disc. The write driver writes outgoing data bits received from an external connection to off-head electronics directly to the writer synchronized with the modified clock signal. The data buffer stores and converts digital data bits sent from the off-head electronics to an analog signal that is synchronized with the modified clock signal.

On head microelectronics for write synchronization

The presently disclosed technology teaches integrating disc drive electronics into a transducer head. Decreased electrical transit times and data processing times can be achieved by placing the electronics on or within the transducer head because electrical connections may be made physically shorter than in conventional systems. The electronics may include one or more of a control system circuit, a write driver, and/or a data buffer. The control system circuit generates a modified clock signal that has a fixed relation to phase and frequency of a bit-detected reference signal that corresponds to positions of patterned bits on the disc. The write driver writes outgoing data bits received from an external connection to off-head electronics directly to the writer synchronized with the modified clock signal. The data buffer stores and converts digital data bits sent from the off-head electronics to an analog signal that is synchronized with the modified clock signal.

ON HEAD MICROELECTRONICS FOR WRITE SYNCHRONIZATION

The presently disclosed technology teaches integrating disc drive electronics into a transducer head. Decreased electrical transit times and data processing times can be achieved by placing the electronics on or within the transducer head because electrical connections may be made physically shorter than in conventional systems. The electronics may include one or more of a control system circuit, a write driver, and/or a data buffer. The control system circuit generates a modified clock signal that has a fixed relation to phase and frequency of a bit-detected reference signal that corresponds to positions of patterned bits on the disc. The write driver writes outgoing data bits received from an external connection to off-head electronics directly to the writer synchronized with the modified clock signal. The data buffer stores and converts digital data bits sent from the off-head electronics to an analog signal that is synchronized with the modified clock signal.

On head microelectronics for write synchronization

The presently disclosed technology teaches integrating disc drive electronics into a transducer head. Decreased electrical transit times and data processing times can be achieved by placing the electronics on or within the transducer head because electrical connections may be made physically shorter than in conventional systems. The electronics may include one or more of a control system circuit, a write driver, and/or a data buffer. The control system circuit generates a modified clock signal that has a fixed relation to phase and frequency of a bit-detected reference signal that corresponds to positions of patterned bits on the disc. The write driver writes outgoing data bits received from an external connection to off-head electronics directly to the writer synchronized with the modified clock signal. The data buffer stores and converts digital data bits sent from the off-head electronics to an analog signal that is synchronized with the modified clock signal.

Set buffer state instruction

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

SET BUFFER STATE INSTRUCTION

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

Set buffer state instruction

Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.

System for efficient recovery of node-B buffered data following MAC layer reset

A method and system for the UE and RNC to reduce transmission latency and potentially prevent loss of PDUs upon a MAC-hs layer reset. The RNC generates a radio resource control (RRC) message with a MAC-hs reset indication. The MAC reset indication requires the UE to flush buffers for configured HARQ processes, disassemble MAC protocol data units (PDUs) in the reordering buffers, deliver MAC-d PDUs to a MAC-d layer, and configure the MAC-hs to receive new data.