Patent classifications
G11C13/047
MULTIDROP OPTICAL INPUT/OUTPUT MODULE
Multidrop optical connections are used for an optical memory module. Multiple buffer integrated circuits on a module each receive information from the host system using different wavelengths of light transmitted on the same waveguide. Multiple buffer integrated circuits each transmit information back to the CPU using different wavelengths of light transmitted on another waveguide. Wavelength resonant ring couplers disposed on the buffer integrated circuits are used to separate the wavelength being received by a particular buffer integrated circuit from the wavelengths of light destined for other buffer integrated circuits on the same waveguide. Wavelength resonant ring modulators also disposed on the buffer integrated circuits modulate specific wavelengths of light unique to each buffer integrated circuit to transmit information to the CPU.
Integrated Circuits With Single-Functional-Unit Level Integration of Electronic and Photonic Elements
Example memory devices and example methods for using memory devices are described. An example memory device may include a first electrical bitline, a second electrical bitline, a bitcell, and an optical waveguide wordline. The bitcell is configured to store a bit value and includes storage circuitry and a pair of light-effect transistor access devices. The storage circuitry includes at least one transistor. The pair of light-effect transistor access devices are arranged for connecting the bitcell to the first electrical bitline and the second electrical bitline. The optical waveguide wordline is arranged for routing an optical signal to the pair of light-effect transistor access devices.
STORAGE DEVICE AND METHOD OF PRODUCING THE SAME
In accordance with a first aspect of the present disclosure, a storage device is provided, comprising: a capacitor configured to be charged; a charge circuit configured to charge said capacitor; a pass device coupled between the charge circuit and the capacitor; a control circuit configured to control said pass device; a photosensitive diode coupled between the control circuit and the pass device, such that an input voltage provided by the control circuit to the pass device is reduced if the storage device is exposed to light. In accordance with a second aspect of the present disclosure, a corresponding method of producing a storage device is conceived.
Van der Waals heterostructure memory device and switching method
A method of switching between first and second states of a van der Waals heterostructure, vdWH, memory device, a vdWH memory device, and a method of fabricating a vdWH memory device. The vdWH memory device comprises a first two-dimensional, 2D, material; and a second 2D material, wherein, in a first storage state of the memory device, an interface between the first and second 2D material comprises interfacial states; and wherein, in a second storage state of the memory device, interfacial states are modulated compared to the first memory state.
Flow cell with selective deposition or activation of nucleotides
An apparatus includes a flow cell body, a plurality of electrodes, an integrated circuit, and an imaging assembly. The flow cell body defines one or more flow channels and a plurality of wells. Each flow channel is configured to receive a flow of fluid. Each well is fluidically coupled with the corresponding flow channel. Each well is configured to contain at least one polynucleotide. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are operable to effect writing of polynucleotides in the corresponding wells. The integrated circuit is operable to drive selective deposition or activation of selected nucleotides to attach to polynucleotides in the wells to thereby generate polynucleotides representing machine-written data in the wells. The imaging assembly is operable to capture images indicative of one or more nucleotides in a polynucleotide.
Nonvolatile memory device and operating method of the same
A nonvolatile memory device includes a resistance switching layer, a gate on the resistance switching layer, a gate oxide layer between the resistance switching layer and the gate, and a source and a drain, spaced apart from each other, on the resistance switching layer. A resistance value of the resistance switching layer is changed based on an illumination of light irradiated onto the resistance switching layer and is maintained as a changed resistance value.
LUMINOUS MEMBER, METHOD OF DRIVING LUMINOUS MEMBER, NON-VOLATILE MEMORY DEVICE, SENSOR, METHOD OF DRIVING SENSOR, AND DISPLAY APPARATUS
Provided are a luminous member, a method of driving the luminous member, a non-volatile memory device, a sensor, a method of driving the sensor, and a display apparatus. The luminous member includes a first electrode; a second electrode facing the first electrode; an emission layer, which is disposed on a main surface of the first electrode and emits light by power applied between the first electrode and the second electrode; and a ferrodielectric layer disposed between the emission layer and the second electrode, wherein AC power applied to the luminous member is controlled based on polarity or magnitude of a residual polarization generated in the ferrodielectric layer, thereby adjusting emission characteristics of the emission layer.
NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME
A nonvolatile memory device includes a resistance switching layer, a gate on the resistance switching layer, a gate oxide layer between the resistance switching layer and the gate, and a source and a drain, spaced apart from each other, on the resistance switching layer. A resistance value of the resistance switching layer is changed based on an illumination of light irradiated onto the resistance switching layer and is maintained as a changed resistance value.
Charge sharing between memory cell plates using a conductive path
Methods, systems, techniques, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be used to charge a second ferroelectric memory cell by transferring charge from a plate of first ferroelectric memory cell to a plate of the second ferroelectric memory cell. In some examples, prior to the transfer of charge, the first ferroelectric memory cell may be selected for a first operation in which the first ferroelectric memory cell transitions from a charged state to a discharged state and the second ferroelectric memory cell may be selected for a second operation during which the second ferroelectric memory cell transitions from a discharged state to a charged state. The discharging of the first ferroelectric memory cell may be used to assist in charging the second ferroelectric memory cell.
3D optical memory storage cells
An apparatus includes a first storage cell with an electrical property. The first storage cell is configured to change the electrical property in response to a first light energy, and to maintain the change to the electrical property. The first storage cell is also configured to alter the change to the electrical property in response to a second light energy, and to maintain the alteration to the change to the electrical property. A second storage cell disposed over the first storage cell in a vertical plane of the first storage cell. A third storage cell disposed adjacent to the first storage cell in a horizontal plane of the first storage cell.