Provided are magnetoresistance effect element and a Heusler alloy in which an amount of energy required to rotate magnetization can be reduced. The magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer positioned between the first ferromagnetic layer and the second ferromagnetic layer, in which at least one of the first ferromagnetic layer and the second ferromagnetic layer is a Heusler alloy in which a portion of elements of an alloy represented by Co.sub.2Fe.sub.αZ.sub.β is substituted with a substitution element, in which Z is one or more elements selected from the group consisting of Mn, Cr, Al, Si, Ga, Ge, and Sn, α and β satisfy 2.3≤α+β, α<β, and 0.5<α<1.9, and the substitution element is an element different from the Z element and has a smaller magnetic moment than Co.

A magnetic memory device includes a conductive line extending in a first direction, a magnetic tunnel junction structure on a first surface of the conductive line, the magnetic tunnel junction structure comprising at least two magnetic patterns and a barrier pattern between the at least two magnetic patterns, and a magnetic layer on a second surface of the conductive line, which is opposite to the first surface. The magnetic layer includes magnetization components having a magnetization in a direction which is parallel to the second surface and intersects the first direction.

A new class of logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates and threshold gates. Input signals in the form of analog, digital, or combination of them are driven to first terminals of non-ferroelectric capacitors. The second terminals of the non-ferroelectric capacitors are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a capacitor comprising non-linear polar material. The second terminal of the capacitor provides the output of the logic gate, which can be driven by any suitable logic gate such as a buffer, inverter, NAND gate, NOR gate, etc. Any suitable logic or analog circuit can drive the output and inputs of the majority logic gate. As such, the majority gate of various embodiments can be combined with existing transistor technologies.

A magnetic memory device includes a magnetic body having magnetic anisotropy and an insulator including a ferromagnetic element. The magnetic body is structurally connected to both ends of the ferromagnetic insulator, and the magnetic body and the ferromagnetic insulator form a ring shape. An easy axis of the magnetic body is directed in a direction parallel to an opening surface of the ring shape in a whole of the magnetic body.

A magnetic memory device includes a conductive line extending in a first direction, and a magnetic track extending in the first direction on the conductive line. The magnetic track includes a lower magnetic layer, a spacer layer and an upper magnetic layer sequentially stacked on the conductive line, and a non-magnetic pattern on the spacer layer and adjacent a side of the upper magnetic layer. The non-magnetic pattern vertically overlaps with a portion of the lower magnetic layer. The lower magnetic layer and the upper magnetic layer are antiferromagnetically coupled to each other by the spacer layer.

A magnetic memory device includes a magnetic track extending in a first direction. The magnetic track includes a lower magnetic layer, an upper magnetic layer on the lower magnetic layer, a non-magnetic pattern on the lower magnetic layer and at a side of the upper magnetic layer, and a spacer layer between the lower magnetic layer and the upper magnetic layer and extending between the lower magnetic layer and the non-magnetic pattern. The lower magnetic layer and the upper magnetic layer are antiferromagnetically coupled to each other by the spacer layer. The non-magnetic pattern has a first surface and a second surface which are opposite to each other in a second direction perpendicular to the first direction. A junction surface between the non-magnetic pattern and the upper magnetic layer is inclined with respect to a reference surface perpendicular to the first surface and the second surface.

A magnetic storage device includes a magnetic body including first and second magnetic regions and a magnetic connection region that connects the first and second magnetic regions, and in which a plurality of magnetic domains each storing information by a magnetization direction thereof is formed, a read element that is electrically connected to the magnetic connection region and by which a magnetization direction of one of the magnetic domains is read, and a write element by which a magnetic domain having a magnetization direction is formed in the magnetic body according to information to be stored. The magnetic domains formed in each of the first and second magnetic regions are shifted in a predetermined direction in response to current that flows through the corresponding one of the first and second magnetic regions.

According to one embodiment, a memory system includes a shift register memory and a controller. The shift register memory includes data storing shift strings. The controller changes a shift pulse, which is to be applied to the data storing shift strings from which first data is read by applying a first shift pulse, to a second shift pulse to write second data to the data storing shift strings and to read the second data from the data storing shift strings. The controller creates likelihood information of data read from the data storing shift strings in accordance with a read result of the second data. The controller performs soft decision decoding for the first data using the likelihood information.

In some examples, an electronic device comprising an input ferroelectric (FE) capacitor, an output FE capacitor, and a channel positioned beneath the input FE capacitor and positioned beneath the output FE capacitor. In some examples, the channel is configured to carry a magnetic signal from the input FE capacitor to the output FE capacitor to cause a voltage change at the output FE capacitor. In some examples, the electronic device further comprises a transistor-based drive circuit electrically connected to an output node of the output FE capacitor. In some examples, the transistor-based drive circuit is configured to deliver, based on the voltage change at the output FE capacitor, an output signal to an input node of a second device.

The present invention relates to a magnetic domain wall displacement type memory cell (racetrack memory device) that includes a 4d or 5d metal dusting layer (DL) at the ferromagnetic/heavy metal interface of the ferromagnetic (FM) structure or the synthetic antiferromagnetic (SAF) structure of the basic racetrack device structure.