A resistive random access memory includes a memory cell including a resistive element having a resistance which varies according to a write operation and stores data according to the resistance of the resistive element, a reference resistive element having a resistance set to a first value, a voltage line set to a first voltage during a first write operation in which the resistance of the resistive element is varied from a second value higher than the first value to the first value, and a voltage control circuit arranged between first ends of the two resistive elements. The voltage control circuit adjusts a value of the first voltage supplied from the voltage line so as to reduce a difference between currents flowing through the two resistive elements during the first write operation, and supply the adjusted first voltage to the first ends of the two resistive elements.

The present invention relates to a method of operating memory cells, comprising reading a previous user data from the memory cells; writing a new user data and merging the new user data with the previous user data into write registers; generating mask register information, and wherein the mask register information indicates bits of the previous user data stored in the memory cells to be switched or not to be switched in their logic values; counting numbers of a first logic value and a second logic value to be written using the mask register information, respectively; storing the numbers of the first logic value and the second logic value into a first counter and a second counter, respectively; and applying a programming pulse to the memory cells according to the mask register information.

A memristor-based circuit includes a voltage generator that applies a series of voltage pulses to a memristor to progressively change the resistance of the memristor. A comparator: receives an input electrical value; receives an electrical value based on the resistance of the memristor; compares the received values; and, based on the comparison, enables the application of the voltage pulses to the memristor by the voltage generator until a defined condition is satisfied. This circuit can be used to enable the memristor to be programmed to a desired resistance value, such as for use as a non-volatile memory. It can also enable the resistance of one memristor to be replicated to another memristor. By counting the number of applied voltage pulses, the circuit can be used as an encoder or analog-to-digital converter. Other variants of the circuit enable construction of a decoder or digital-to-analog converter, and an authentication circuit.

A method for operating a differential memory includes: operating a main memory module differentially while executing a first program; copying first logic data from a first submodule of the main memory module to an auxiliary memory module; storing third logic data associated with a second program in a second submodule of the main memory module by overwriting second logic data associated with the first program, while maintaining the first logic data contained in the first submodule of the main memory module unaltered, where the second logic data are complementary to the first logic data; when a request for reading the first logic data is received during the storing of the third logic data in the second submodule of the main memory module, reading the first logic data from the auxiliary memory module; and executing the first or second programs by operating the main memory module in single-ended mode.

Numerous embodiments of circuitry for a set-while-verify operation and a reset-while verify operation for resistive random access memory cells are disclosed. In one embodiment, a set-while-verify circuit for performing a set operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the set operation is complete. In another embodiment, a reset-while-verify circuit for performing a reset operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the reset operation is complete.

A memristor-based circuit includes a voltage generator that applies a series of voltage pulses to a memristor to progressively change the resistance of the memristor. A comparator: receives an input electrical value; receives an electrical value based on the resistance of the memristor; compares the received values; and, based on the comparison, enables the application of the voltage pulses to the memristor by the voltage generator until a defined condition is satisfied. This circuit can be used to enable the memristor to be programmed to a desired resistance value, such as for use as a non-volatile memory. It can also enable the resistance of one memristor to be replicated to another memristor. By counting the number of applied voltage pulses, the circuit can be used as an encoder or analog-to-digital converter. Other variants of the circuit enable construction of a decoder or digital-to-analog converter, and an authentication circuit.

A data-write device includes a write driver that causes a current to flow through a current path including an MTJ element or the other current path including the MTJ element in accordance with writing data to be written, thereby writing the write data into the MTJ element, a write completion detector which monitors the voltage at a first connection node or a second connection node in accordance with the write data after the writing of the write data into the MTJ element starts, detects the completion of writing of the write data based on the voltage at either node, and supplies a write completion signal indicating the completion of data write, and a write controller that terminates the writing of the write data into the MTJ element in response to the write completion signal supplied from the write completion detector.

According to one embodiment, a memory device includes a memory cell including a resistance change memory portion and a switching portion, and a voltage applying circuit carrying out, at a time of writing data to the memory cell, an operation of applying a voltage of a first polarity to the memory cell and applying a first voltage to the memory cell, an operation of applying a voltage of a second polarity to the memory cell and applying a second voltage to the memory cell, an operation of applying a voltage of the first polarity to the memory cell and applying a third voltage to the memory cell, or an operation of applying a voltage of the second polarity to the memory cell and applying a fourth voltage to the memory cell.

A set procedure of a one transistor, one memristor memory elements may comprise determining a gate voltage for the transistor based on the desired target value. Increasing set pulses may be applied to memristor while the gate is held at the determined gate voltage.

Two-terminal memory can be set to a first state (e.g., conductive state) in response to a program pulse, or set a second state (e.g., resistive state) in response to an erase pulse. These pulses generally provide a voltage difference between the two terminals of the memory cell. Certain electrical characteristics associated with the pulses can be manipulated in order to enhance the efficacy of the pulse. For example, the pulse can be enhanced or improved to reduce power-consumption associated with the pulse, reduce a number of pulses used to successfully set the state of the memory cell, reduce wear or damage to the memory cell, or to improve Ion or Ioff distribution associated with changing the state of the memory cell.