A three-dimensional thermistor device and a manufacturing method thereof. The three-dimensional thermistor device comprising a thermistor array formed on a base layer extending in first and second directions. Where the thermistor array comprises: thermistor pattern layers and insulating layers stacked alternately on the base layer in a third direction; each thermistor pattern layer including a continuous electrically conductive first trace disposed along a first path extending in both the first and second directions, and each insulating layer including an electrically conductive first via extending through the insulating layer in the third direction to electrically connect the first traces to each other. Where successive electrical connections between the respective first vias on the stacked insulating layers and the respective first traces on the stacked thermistor layers form a continuous electrical first thermistor element extending in the first, second and third directions across multiple of the thermistor pattern layers.

A three-dimensional thermistor device and a manufacturing method thereof. The three-dimensional thermistor device comprising a thermistor array formed on a base layer extending in first and second directions. Where the thermistor array comprises: thermistor pattern layers and insulating layers stacked alternately on the base layer in a third direction; each thermistor pattern layer including a continuous electrically conductive first trace disposed along a first path extending in both the first and second directions, and each insulating layer including an electrically conductive first via extending through the insulating layer in the third direction to electrically connect the first traces to each other. Where successive electrical connections between the respective first vias on the stacked insulating layers and the respective first traces on the stacked thermistor layers form a continuous electrical first thermistor element extending in the first, second and third directions across multiple of the thermistor pattern layers.

An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.

An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.

Structurally supported positive temperature coefficient (PTC) materials are disclosed. Furthermore, methods to provide structurally supported PTC materials are disclosed. In one implementation, a structurally supported PTC material includes a support structure that is at least partially covered by a PTC material. In one example, the support structure is a mesh material integrated at least partially in the PTC material.

Structurally supported positive temperature coefficient (PTC) materials are disclosed. Furthermore, methods to provide structurally supported PTC materials are disclosed. In one implementation, a structurally supported PTC material includes a support structure that is at least partially covered by a PTC material. In one example, the support structure is a mesh material integrated at least partially in the PTC material.

A sensor device is disclosed comprising at least one deformable substrate, at least one transducer element formed in or on a surface area of a first side of the deformable substrate, at least one other transducer element formed in or on a surface area of a second side of the deformable substrate, and electrical conductors formed on and/or in the substrate for electrically connecting between and to the transducer elements.

A sensor device is disclosed comprising at least one deformable substrate, at least one transducer element formed in or on a surface area of a first side of the deformable substrate, at least one other transducer element formed in or on a surface area of a second side of the deformable substrate, and electrical conductors formed on and/or in the substrate for electrically connecting between and to the transducer elements.

A measuring resistor for high-current measurements is provided, which has a defined resistance value. The measuring resistor has a resistive layer having a sheet resistivity. The resistance value of the measuring resistor is defined by the resistive layer and is less than the sheet resistivity of the resistive layer.

A measuring resistor for high-current measurements is provided, which has a defined resistance value. The measuring resistor has a resistive layer having a sheet resistivity. The resistance value of the measuring resistor is defined by the resistive layer and is less than the sheet resistivity of the resistive layer.