A semiconductor device includes a first terminal, a second terminal positioned away from the first terminal, a first resistive segment coupled between the first terminal and the second terminal, a third terminal positioned away from the first terminal and the second terminal, a second resistive segment coupled between the second terminal and third terminal, a first floating plate disposed physically proximate the first resistive segment and including a first end coupled to one of the first terminal and the second terminal, and a second floating plate disposed physically proximate the second resistive segment and including a first end coupled to one of the second terminal and the third terminal.

Self-cooling semiconductor resistor and manufacturing method thereof are provided. The resistor comprises: multiple N-type and P-type wells in a semiconductor substrate, first polysilicon gates on each N-type well, second polysilicon gates on each P-type well, and metal interconnect layers. The multiple N-type and P-type wells are arranged alternately in row and column direction, respectively. N-type and P-type deep doped regions are formed on each N-type and P-type well, respectively. The first and second polysilicon gates are N-type and P-type deep doped respectively, and there is no gate oxide layer between the first and second polysilicon gates and the semiconductor substrate. The metal interconnect layers connect the multiple first and second polysilicon gates as an S-shaped structure. In the present application, the flow direction of heat is from the inside of the resistor to its surface, thereby realizing heat dissipation and cooling.

A chip component comprises: an insulating substrate on which a resistor serving as a functional element is formed; a pair of internal electrodes (front electrodes, end surface electrodes, and back electrodes) that is formed to cover both end portions of the insulating substrate and connected to the resistor; a barrier layer that is formed on a surface of each of the internal electrodes and mainly composed of nickel; and an external connection layer that is formed on a surface of the barrier layer and mainly composed of tin, and the barrier layer is composed of alloy plating (Ni—P) including nickel and phosphorus, which is formed by electrolytic plating, and a content ratio of phosphorus relative to nickel is set in a range of 0.5% to 5% so that the barrier layer has magnetism.

The present invention provides a chip resistor and a method of making the same for alleviating stress resulted from thermal expansion difference and thus suppressing cracks. A chip resistor includes: a substrate, having a carrying surface and a mounting surface facing away from each other; a pair of upper electrodes, disposed at two ends of the carrying surface; a resistor, disposed on the carrying surface and between the pair of upper electrodes, and electrically connected to the pair of upper electrodes; a stress relaxation layer having flexibility and formed on the mounting surface of the substrate; a metal thin film layer, formed on a surface of the stress relaxation layer opposite to the substrate; a side electrode for electrically connecting the upper electrodes and the metal thin film layer; and a plating layer covering the side electrode and the metal thin film layer.

An NTC thin film thermistor that includes at least a first thin film electrode, at least an NTC thin film, and at least a second thin film electrode. A further aspect relates to a method for producing an NTC thin film thermistor.

A resistor includes a resistive element, an insulation plate, a protective film, and a pair of electrodes. The resistive element includes a first face and a second face arranged to face in opposite directions in a thickness direction. The insulation plate is on the first face, and the protective film on the second face. The electrodes are spaced apart in a first direction perpendicular to the thickness direction, and held in contact with the resistive element. Each electrode includes a bottom portion opposite to the insulation plate with respect to the resistive element in the thickness direction. Each bottom portion overlaps with a part of the protective film as viewed in the thickness direction. The resistor further includes a pair of intermediate layers spaced apart in the first direction. The intermediate layers are formed of a material electrically conductive and containing a synthetic resin. Each intermediate layer includes a cover portion covering a part of the protective film. The cover portion of each intermediate layer is disposed between the protective film and the bottom portion of one of the electrodes.

A resistor includes a resistive element, an insulation plate, a protective film, and a pair of electrodes. The resistive element includes a first face and a second face arranged to face in opposite directions in a thickness direction. The insulation plate is on the first face, and the protective film on the second face. The electrodes are spaced apart in a first direction perpendicular to the thickness direction, and held in contact with the resistive element. Each electrode includes a bottom portion opposite to the insulation plate with respect to the resistive element in the thickness direction. Each bottom portion overlaps with a part of the protective film as viewed in the thickness direction. The resistor further includes a pair of intermediate layers spaced apart in the first direction. The intermediate layers are formed of a material electrically conductive and containing a synthetic resin. Each intermediate layer includes a cover portion covering a part of the protective film. The cover portion of each intermediate layer is disposed between the protective film and the bottom portion of one of the electrodes.

A chip resistor includes a resistive element, a first conductive underlying layer, a second conductive underlying layer, a first electrode, and a second electrode. The first electrode includes a first electrode layer. The second electrode includes a second electrode layer. A first electrical resistivity of the first conductive underlying layer is higher than a second electrical resistivity of the first electrode layer and higher than a third electrical resistivity of the resistive element. A fourth electrical resistivity of the second conductive underlying layer is higher than a fifth electrical resistivity of the second electrode layer and higher than the third electrical resistivity of the resistive element.

A method for manufacturing a resistor is described. First and second division lines are formed in a first surface of a substrate to define device areas. First and second electrodes are formed on the first surface and respectively on the device areas. Third electrodes, fourth electrodes, and resistive layers are formed on a second surface of the substrate and respectively on the device areas. The substrate is diced from the second surface by a cutting tool to form bar structures to expose opposite first and second side surfaces of the device areas. First and second terminal electrodes are formed to respectively cover the first and second side surfaces. The bar structures are diced from the second surface by the cutting tool to separate the device areas. The cutting tool is aligned with the first and second division lines respectively while dicing the substrate and the bar structures.

A high-power resistor includes a substrate, a resistor layer, two edge electrodes, and a seed layer. The substrate has a first surface. The resistor layer is mounted on the first surface of the substrate. The two edge electrodes are mounted on the resistor layer. The seed layer is mounted between the resistor layer and the two edge electrodes. A contacting surface between one of the two edge electrodes and the resistor layer is bigger than contacting side surfaces of a printed resistor layer and printed conduction layers from a conventional chip resistor, creating less electrical resistance. When high-power electricity passes through the resistor layer, heat generated by a large passing current can be equally dissipated in all directions on the contact surface. With less electrical resistance and better heat dissipation, the contacting surface enables the high-power resistor to tolerate greater electric power.