An electrical circuit comprising at least two negative capacitance insulators connected in series, one of the two negative capacitance insulators is biased to generate a negative capacitance. One of the negative capacitance insulators may include an air-gap which is part of a nanoelectromechnical system (NEMS) device and the second negative capacitance insulator includes a ferroelectric material. Both of the negative capacitance insulators may be located between the channel and gate of a field effect transistor. The NEMS device may include a movable electrode, a dielectric and a fixed electrode and arranged so that the movable electrode is attached to at least two points and spaced apart from the dielectric and fixed electrode, and the ferroelectric capacitor is electrically connected to either of the electrodes.

An electrical circuit comprising at least two negative capacitance insulators connected in series, one of the two negative capacitance insulators is biased to generate a negative capacitance. One of the negative capacitance insulators may include an air-gap which is part of a nanoelectromechnical system (NEMS) device and the second negative capacitance insulator includes a ferroelectric material. Both of the negative capacitance insulators may be located between the channel and gate of a field effect transistor. The NEMS device may include a movable electrode, a dielectric and a fixed electrode and arranged so that the movable electrode is attached to at least two points and spaced apart from the dielectric and fixed electrode, and the ferroelectric capacitor is electrically connected to either of the electrodes.

A HfO2-based ferroelectric capacitor and a preparation method therefor, and a HfO2-based ferroelectric memory, relating to the technical field of microelectronics. The purpose of enlarging the memory window of the ferroelectric memory is achieved by inserting an Al.sub.2O.sub.3 intercalation layer having a coefficient of thermal expansion smaller than TiN between a dielectric layer and an upper electrode (TiN) of the ferroelectric capacitor. The HfO.sub.2-based ferroelectric capacitor comprises a substrate layer, a lower electrode, a dielectric layer, an Al.sub.2O.sub.3 intercalation layer, an upper electrode and a metal protection layer from bottom to top. The memory window can be increased, information misreading is effectively prevented, and therefore, the reliability of the memory is improved.

Described is an ultra-dense ferroelectric memory. The memory is fabricated using a patterning method by that applies atomic layer deposition with selective dry and/or wet etch to increase memory density at a given via opening. A ferroelectric capacitor in one example comprises: a first structure (e.g., first electrode) comprising metal; a second structure (e.g., a second electrode) comprising metal; and a third structure comprising ferroelectric material, wherein the third structure is between and adjacent to the first and second structures, wherein a portion of the third structure is interdigitated with the first and second structures to increase surface area of the third structure. The increased surface area allows for higher memory density.

Described is an ultra-dense ferroelectric memory. The memory is fabricated using a patterning method by that applies atomic layer deposition with selective dry and/or wet etch to increase memory density at a given via opening. A ferroelectric capacitor in one example comprises: a first structure (e.g., first electrode) comprising metal; a second structure (e.g., a second electrode) comprising metal; and a third structure comprising ferroelectric material, wherein the third structure is between and adjacent to the first and second structures, wherein a portion of the third structure is interdigitated with the first and second structures to increase surface area of the third structure. The increased surface area allows for higher memory density.

A manufacturing method of an electronic device is provided. The manufacturing method of the electronic device includes following steps: providing a substrate; bonding at least one electronic component to the substrate, wherein the at least one electronic component is mainly driven by a reverse bias in an operating mode; applying a forward bias to the at least one electronic component, and determining whether the at least one electronic component is normal or failed; and transporting the substrate configured with the at least one electronic component determined to be normal to a next production site or repairing the at least one electronic component determined to be failed.

A low-temperature radio-frequency tuning circuit has a capacitor and an inductor. The capacitor has a capacitance between two electrodes associated with a dielectric medium, and the capacitance is tunable. The medium is a quantum paraelectric material. The capacitance is tunable by application of a voltage to apply an electric field to the medium. The capacitance is tunable at a temperature of less than 4 K by use of the quantum paraelectric material as the dielectric medium.

A low-temperature radio-frequency tuning circuit has a capacitor and an inductor. The capacitor has a capacitance between two electrodes associated with a dielectric medium, and the capacitance is tunable. The medium is a quantum paraelectric material. The capacitance is tunable by application of a voltage to apply an electric field to the medium. The capacitance is tunable at a temperature of less than 4 K by use of the quantum paraelectric material as the dielectric medium.

Systems, devices, and methods are discussed herein for wirelessly transmitting power and/or data to an implanted device, such as an implanted electrostimulator device. In an example, the subject matter includes a layered transmitter device with multiple conductive planes and excitation features. The transmitter device can be tuned to identify and apply device parameters for efficient wireless communication with a deeply implanted device. The transmitter is generally configured for midfield powering applications by providing signals that give rise to propagating signals inside of body tissue.

The present invention relates to an integrated electronic circuit and method of making comprising a first transistor (1) and a ferroelectric capacitor (2). The ferroelectric capacitor (2) comprises a first electrode layer composed of a non-ferroelectric material, a ferroelectric interlayer having a thickness that is less than the thickness of the first electrode layer, and a second electrode layer composed of a non-ferroelectric material, wherein the ferroelectric interlayer is arranged between the first electrode layer and the second electrode layer, and the first electrode layer is electrically conductively connected to a gate terminal of the first transistor (1).