An electron source (2) for generating an electron beam (8) having a cathode (1) and an anode (4) in the form of a graphene layer (6, 12) epitaxially grown on a silicon carbide substrate (5). The invention is suitable for monolithic preparation of a miniaturized source of a high-energy focused electron beam, including its use as an on-chip X-ray source. All components can be prepared from or on a single silicon carbide chip.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

A laminated body is provided in a circumferential shape with a gap formed in a part of a circumferential direction on a semiconductor layer. In the laminated body, a first insulating layer, a gate layer, a second insulating layer, and a drain layer are layered in this order from the semiconductor layer side. An impurity diffusion layer is formed on a surface of the semiconductor layer, and a backside electrode on a backside surface. The impurity diffusion layer extends from a position in contact with side walls in a channel space to an outside of the laminated body through a region corresponding to the gap on the surface of the semiconductor layer. A portion of the impurity diffusion layer beyond the laminated body is a contact region to which a wiring for applying a predetermined voltage is connected. A cover layer made of an insulating material is formed in an upper portion and a periphery of the annular portion including the laminated body and the gap.

In an embodiment, a method includes forming a first diamond layer on a substrate and inducing a layer of graphene from the first diamond layer by heating the substrate and the first diamond layer. The method includes forming a second diamond layer on top of the layer of graphene and applying a mask to the second diamond layer. The mask includes a shape of a cathode, an anode, and one or more grids. The method further includes forming a two-dimensional cold cathode, a two-dimensional anode, and one or more two-dimensional grids by reactive-ion electron-beam etching. Each of the two-dimensional cold cathode, the two-dimensional anode, and the one or more two-dimensional grids includes a portion of the first diamond layer, the graphene layer, and the second diamond layer such that the graphene layer is positioned between the first diamond layer and the second diamond layer.

An on-chip miniature X-ray source, comprising: an on-chip miniature electron source (10); a first insulating spacer (11) located on one side of the on-chip miniature electron source (10) emitting electrons, the first insulating spacer (11) being of a cavity structure; and an anode (12) located on the first insulating spacer (11), a closed vacuum cavity being formed between the on-chip miniature electron source (10) and the anode (12). The on-chip miniature electron source can be obtained by means of a micromachining technique, further reducing the size thereof, and reducing the manufacturing costs. The on-chip miniature X-ray source has the advantages of stable X-ray dose, low operation vacuum requirement, fast switch response, integrated and mass processing, etc. and can be used in various types of small and portable X-ray detection, analysis and treatment devices.

Provided are an on-chip micro electron source and manufacturing method thereof. The on-chip micro electron source is provided with a heat conductive layer (10), and at least one electrode (122) in the same pair of electrodes is connected with the heat conductive layer (10) via a through hole (111) of an insulating layer, such that the heat generated by the on-chip micro electron source can be dissipated through the electrode (122) and the heat conductive layer (10), thereby significantly improving the heat dissipation ability of the on-chip electron source. Therefore, the on-chip micro electron source is capable of integrating multiple single electron sources on the same substrate to form an electron source integration array with a high integration level, enabling the on-chip electron source to have high overall emission current, further meeting more application requirements. The on-chip micro electron source can be widely applied to various electronic devices involving electron sources, for example, X-ray tubes, microwave tubes, flat-panel displays and the like.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

A vacuum channel field effect transistor includes a first insulator on a p-type semiconductor substrate, a gate electrode on the first insulator, a second insulator on the gate electrode, a drain electrode on the second insulator, and an n+ impurity diffusion layer in the surface of the p-type semiconductor substrate, the n+ impurity diffusion layer being in contact with a side wall including side faces of the first insulator, the gate electrode, and the second insulator. Application of predetermined voltages to the n+ impurity diffusion layer, the gate electrode, and the drain electrode causes charge carriers in the n+ impurity diffusion layer to travel through a vacuum or air faced by the side wall to the drain electrode, which can increase the source-drain current.

Provided are an on-chip miniature electron source and a method for manufacturing the same. The on-chip miniature electron source includes: a thermal conductive layer; an insulating layer provided on the thermal conductive layer, where the insulating layer is made of a resistive-switching material, and at least one through hole is provided in the insulating layer; and at least one electrode pair provided on the insulating layer, where at least one electrode of the electrode pair is in contact with and connected to the thermal conductive layer via the through hole, where there is a gap between two electrodes of the electrode pair, and a tunnel junction is formed within a region of the insulating layer under the gap. Thus, heat generated by the on-chip micro electron source can be dissipated through the electrode and the thermal conductive layer, thereby significantly improving heat dissipation ability of the on-chip miniature electron source.