A method for etching a main surface of a thin layer of a substrate, which comprises immersing the substrate n an etching bath so as to expose the main surface to an etching agent, the substrate being oriented relative to the bath such that: —when it is introduced into the bath, the main surface is gradually immersed from an initial introduction point (PII) to an end introduction point (PFI), at an introduction speed, and —when it exits the bath, the main surface gradually emerges from an initial exit point (PIS) to an end exit point (PFS), at an exit speed, the method being characterized in that: —the introduction speed is chosen in such a way as to etch the main surface according to a first non-uniform profile between the initial introduction point (PII) and the end introduction point (PFI), and/or —the exit speed is chosen in such a way as to etch the main surface according to a second non-uniform profile between the initial exit point (PIS) and the end exit point (PFS), in order to compensate for non-uniformities in the thickness of the thin layer.

Provided are a deposition process monitoring system capable of detecting an internal state of a chamber in a deposition process, and a method of controlling the deposition process and a method of fabricating a semiconductor device using the system. The deposition process monitoring system includes a facility cover configured to define a space for a deposition process, a chamber located in the facility cover, covered with a translucent cover dome, and having a support on which a deposition target is placed, a plurality of lamps disposed in the facility cover, the lamps respectively disposed above and below the chamber, the lamps configured to supply radiant heat energy into the chamber during the deposition process, and a laser sensor disposed outside the chamber, the laser sensor configured to irradiate the cover dome with a laser beam and detect an intensity of the laser beam transmitted through the cover dome, wherein a state of by-products with which the cover dome is coated is determined based on the detected intensity of the laser beam.

A method of forming a semiconductor device includes depositing a film over a dielectric layer. The dielectric layer is over a first fin, a second fin, and within a trench between the first fin and the second fin. The method further includes etching top portions of the film, performing a treatment on the dielectric layer to remove impurities after etching the top portions of the film, and filling the trench over the remaining portions of the film. The treatment includes bombarding the dielectric layer with radicals.

A turnaround mechanism of silicon wafers is provided. The turnaround mechanism includes a material frame, a supporting component, a second clamping component. The frame is provided with a material tank. The supporting component includes at least one first clamping component, and each of the at least one first clamping component is configured to clamp or release a support. The second clamping component includes two first rotating shafts disposed oppositely and two second clamping members, the two first rotating shafts are rotatably connected to the material frame, the two second clamping members are correspondingly disposed on the two first rotating shafts respectively, and each of the two second clamping members can rotate with a corresponding first rotating shaft, enabling the two second clamping members to move toward each other to clamp the silicon wafers to be separated.

A method for making a semiconductor device may include forming shallow trench isolation (STI) regions in a semiconductor substrate defining an active region therebetween in the semiconductor substrate and a pad oxide on the active region. The method may further include removing at least some of the pad oxide, cleaning the active region to expose an upper surface thereof and define rounded shoulders of the active region adjacent the STI regions having an interior angle of at least 125°, and forming a superlattice on the active region. The superlattice may include a plurality of stacked groups of layers, each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a semiconductor circuit including the superlattice.

Proposed are a method and a system for removing L-FC in a plasma etching process, in which L-FC, which is condensed on a wafer, an electrode, a substrate, a head, or the like, is removed by using infrared or ultraviolet rays in a plasma etching process using an L-FC precursor.

The present disclosure provides a method of forming a semiconductor device including an nFET structure and a pFET structure where each of the nFET and pFET structures include a semiconductor substrate and a gate trench. The method includes depositing an interfacial layer in each gate trench, depositing a first ferroelectric layer over the interfacial layer, removing the first ferroelectric layer from the nFET structure, depositing a metal oxide layer in each gate trench, depositing a second ferroelectric layer over the metal oxide layer, removing the second ferroelectric layer from the pFET structure, and depositing a gate electrode in each gate trench.

A method includes forming a gate structure and an interlayer dielectric (ILD) layer over a substrate; selectively forming an inhibitor over the gate structure; performing an atomic layer deposition (ALD) process to form a dielectric layer over the ILD layer, wherein in the ALD process the dielectric layer has greater growing rate on the ILD than on the inhibitor; and performing an atomic layer etching (ALE) process to etch the dielectric layer until a top surface of the inhibitor is exposed, in which a portion of the dielectric layer remains on the ILD layer after the ALE process is complete.

There is provided a technique that includes: (a) lowering a temperature in a process chamber supplied with a cleaning gas containing a halogen element while being heated to a first temperature, from the first temperature to a second temperature equal to or lower than a temperature at which substrate processing is performed in the process chamber, while vacuum-exhausting an inside of the process chamber; and (b) after (a), supplying a gas containing a water vapor into the process chamber while vacuum-exhausting the inside of the process chamber, to cause the halogen element remaining in the process chamber to react with the water vapor.

A coating film forming method includes coating a coating liquid by supplying the same to a front surface of a substrate and rotating the substrate to form a coating film, supplying a high-temperature gas having a temperature higher than the substrate to an exposed region of a rear surface of the substrate, adjusting film thickness distribution of the coating film in a plane of the substrate by rotating the substrate at a first rotation speed, and drying, after the adjusting the film thickness distribution, the coating film by adjusting the film thickness of the coating film in an entire plane of the substrate by rotating the substrate at a second rotation speed different from the first rotation speed. A period in which the drying of the coating film is performed includes a period in which the supplying of the high-temperature gas to the substrate is stopped.